Transverse high-voltage MOS device and manufacturing method thereof

Abstract

The invention discloses a transverse high-voltage metal oxide semiconductor (MOS) device, which is formed by burying an inversion buried layer into a drifting region of the device. The invention also discloses a method for manufacturing the transverse high-voltage MOS device, which comprises the following steps of: forming a first conduction type buried layer, a first conduction type epitaxial layer and a sacrifice oxide layer on a silicon substrate, and determining an implantation position of the inversion buried layer in the drifting region by adopting a photoetching process; performing second conduction type foreign ion implantation by taking photoresist as a mask to form an inversion impurity region; manufacturing a field oxide layer, and activating and boosting inversion impurities simultaneously in the thermal process of growing the field oxide layer to form the shallow inversion buried layer in the drifting region; and forming a channel region, a source oxide layer, a drain oxide layer, a gate oxide layer and a gate. Electric-field distribution in the drifting region can be changed, a surface electric field of a device can be reduced and withstand voltage performance and reliability can be improved.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor integrated circuits, in particular to a lateral high-voltage MOS device, and also relates to a method for manufacturing the lateral high-voltage MOS device. Background technique [0002] Lateral high-voltage MOS devices have high withstand voltage and are easy to integrate, and are widely used in high-voltage integrated circuits and power integrated circuits. Such as figure 1 As shown, it is an existing lateral high-voltage MOS device, and the device structure is: a buried layer of the first conductivity type is formed on a silicon substrate, and an epitaxial layer of the first conductivity type is formed on the buried layer of the first conductivity type; A channel region of the second conductivity type is formed in the epitaxial layer of the first conductivity type, and a heavily doped source region of the first conductivity type is formed in the channel region of the second conductiv...

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Problems solved by technology

[0003] Existing lateral high-voltage MOS devices will generate excessively high surface electric fields, which limits the improvement of their withstand voltage performance. Under high-voltage and high-current operating conditions, gate oxide layer breakdown is prone to occur, causing device damage and seriously affecting device reliability. sex

The commonly used internal field limiting ring is not suitable for devices with a smaller size. For small-sized high-voltage tubes that do not require particularly high withstand voltages, it will cause high on-resistance and reduce device performance.

The commonly used Reduced surface field (RESURF) technology is too dependent on process conditions such as epitaxial layer thickness and concentration, which is not conducive to the use of platforms containing multiple types of devices

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