Single event resistance latch structure based on state saving mechanism

Abstract

The invention relates to a single event resistance latch structure based on a state saving mechanism, comprising a signal time delay circuit and a single event resistance latch circuit, wherein the delay time of the time delay circuit is more than the maximum pulse width generated by the transient disturbance of a single event; the single event resistance latch circuit simultaneously receives and compares an external input signal and an external input time delay signal of the external input signal, which is output by the signal time delay circuit; when the external input signal and the external input time delay signal are same, the single event resistance latch circuit outputs and latches a corresponding state signal according to the state of the external input signal; and when the external input signal and the external input time delay signal are different, the single event resistance latch circuit outputs a state signal latched by the single event resistance latch circuit on the previous moment. The single event resistance latch structure provided by the invention improves the restoring speed after a circuit is disturbed by the single event, can prevent SEU (Single Event Upset) effect and SET (Single Event Transient) effect from disturbing the circuit, has simple circuit structure, reduces occupation area, lowers power consumption and improves system reliability.

Description

technical field [0001] The present invention relates to an anti-single event latch structure, especially an anti-single event latch structure based on a state preservation mechanism, specifically a latch structure capable of resisting single event flipping and preventing single event disturbance . Background technique [0002] When electronic devices work in space, they will be hit by high-energy protons, high-energy neutrons and heavy particles in the universe. The impact itself, as well as the secondary particles produced by the impact, ionize electron-hole pairs on the bulk silicon; when the amount of charge accumulated by the ionization reaches a certain magnitude, it will disturb the state of the circuit. Such as: bit flips in memory cells, transient pulses in combinational logic, etc. These effects are often called single event effects. Single event effects can be divided into: single event latch-up (SEL), single event upset (SEU), single event transient disturbance...

AI Technical Summary

Problems solved by technology

The limitation of this method is that using a separate delay filter will increase the overhead of system timing

The structure of triple-mode redundancy plus majority voter can completely eliminate the single event effect on the circuit, but it will bring up to 3.5 times the additional overhead in terms of area and power consumption

Images