Semiconductor structure and forming method thereof

A semiconductor and structural layer technology, applied in the field of semiconductor structure and its formation, can solve the problems of limited film thickness, film cracking, poor film quality, etc., and achieve the effect of improving quality and good mechanical support

Active Publication Date: 2011-06-22
安徽长飞先进半导体有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, there is a large thermal stress mismatch between Si and these III-V compound semiconductor materials. The thermal stress mismatch will cause cracks in the film when the epitaxial thickness is large, and the quality of the epitaxial film is not good. thus limiting the thickness of the film

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  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

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Embodiment Construction

[0033] Embodiments of the present invention are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals designate the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary only for explaining the present invention and should not be construed as limiting the present invention.

[0034]The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and arrangements of specific examples are described below. Of course, they are only examples and are not intended to limit the invention. Furthermore, the present invention may repeat reference numerals and / or letters in different instances. This repetition is for the purpose of simplicity and clarity and does not in itself indicate...

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Abstract

The invention provides a semiconductor structure comprising a first semiconductor material substrate, a first porous structure layer, a second porous structure layer and a second semiconductor material layer, wherein the first porous structure layer is formed on the first semiconductor material substrate; the second porous structure layer is formed on the first porous structure layer; the porosity and the aperture of the second porous structure layer are both less than the porosity and the aperture of the first porous structure layer; and the second semiconductor material layer is formed on the second porous structure layer. The invention can release the thermal mismatch stress of Si materials and epitaxial materials through the porous structure layers, prevent the problems of cracking and the like of an epitaxial film with larger thickness and enhance the quality of an epitaxial film crystal, thereby extending an epitaxial material layer (such as GaN and the like) which has large thickness and higher thermal mismatch stress with the Si materials on a Si substrate; and in addition, the porous Si materials can be removed in a subsequent process, therefore a subsequent device process can not be influenced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing and design, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In recent years, light emitting diodes (light emitting diodes, LEDs) have been widely used in display screens, backlight sources, special lighting, and other fields due to their long life, high luminous efficiency, small size, durability, and rich colors. The core of the LED is the LED epitaxial wafer, and its main structure includes: a substrate, a buffer layer, an N-type semiconductor layer, an active region light-emitting layer, an electron blocking layer, and a P-type semiconductor layer. As the core of the LED epitaxial wafer, the light-emitting layer in the active area is between the N-type semiconductor layer and the P-type semiconductor layer, so that the interface between the P-type semiconductor layer and the N-type semiconductor layer forms a PN junction...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L33/20H01L21/02H01L33/00C25D11/32C30B25/04C30B29/40
Inventor 王楚雯赵东晶
Owner 安徽长飞先进半导体有限公司
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