Semiconductor memory device and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the field of semiconductor memory device and semiconductor memory device manufacturing, can solve problems such as poor compatibility of logic circuits, and achieve the effects of simple process, stable process and improved compatibility
CN102169882BActive Publication Date: 2015-02-25SUZHOU ORIENTAL SEMICONDUCTOR CO LTD

Patent Information

Authority / Receiving Office
CN Β· China
Patent Type
Patents(China)
Current Assignee / Owner
SUZHOU ORIENTAL SEMICONDUCTOR CO LTD
Publication Date
2015-02-25

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Abstract

The invention discloses a semiconductor memory device, which comprises a source, a drain, a floating gate region, a control gate, a planar channel region and a gate controlled diode, wherein the gate controlled diode is used for connecting the floating gate region and the drain; and in the semiconductor memory device, the floating gate region is used for memorizing information, the gate controlled diode is used for connecting a floating gate and a substrate, and the floating gate is charged or discharged by the gate controlled diode. The semiconductor memory device is manufactured by using a self-alignment process, and the process is simple and stable; and in the invention, manufacturing of a logic circuit and a flash memory device is compatible by using a planar channel structure.
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Description

technical field

[0001] The invention relates to a semiconductor device, in particular to a semiconductor memory device; the invention also relates to a manufacturing method of the semiconductor memory device. Background technique

[0002] Semiconductor memories are widely used in various electronic products. Different application areas place different requirements on the structure, performance and density of semiconductor memories. For example, static random access memory (SRAM) has high random access speed and low integration density, while standard dynamic random access memory (DRAM) has high density and medium random access speed.

[0003] Figure 1a-1c Several major existing semiconductor memory cells are shown. in Figure 1a 1b represents a 6-transistor (6-T) SRAM cell; 1c represents a 1-transistor floating body cell (FBC) memory cell.

[0004] see Figure 1a , a conventional 1T-1C DRAM cell consists of a transistor 103 and a capacitor 104 . In operation, it can b...

Claims

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