STI (Shallow Trench Isolation) structure and manufacturing method thereof

Abstract

The invention discloses a manufacturing method of an STI (Shallow Trench Isolation) structure. The manufacturing method comprises the following steps of: forming a hard mask layer on a semiconductor substrate; etching the hard mask layer and the semiconductor substrate to form a shallow trench; forming an oxide lining layer on the sidewall of the shallow trench and forming nitride lining layers on the oxide lining layer and the hard mask layer; depositing a first insulating layer, filling of the shallow trench and covering the oxide lining layer; carrying out an annealing process and flattening the first insulating layer to expose the nitride layer; removing a part of the first insulating layer in the shallow trench by carrying out a first wet etching process; removing the nitride lining layer on the hard mask layer by carrying out a second wet etching process to enable the height of the nitride lining layer on the sidewall of the shallow trench to be equal to the height of the first insulating layer; depositing a second insulating layer, filling of the shallow trench and covering the hard mask layer; and removing the second insulating layer and the hard mask layer on the semiconductor substrate to form the STI structure. Through the manufacturing method disclosed by the invention, the generation of seams in the shallow trench can be avoided.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor device, in particular to forming a trench isolation structure and a forming method thereof. Background technique [0002] As the size of integrated circuits decreases, the devices that make up the circuits must be placed more densely to fit the limited space available on the chip. As current research focuses on increasing the density of active devices per unit area of ​​a semiconductor substrate, effective insulation between circuits becomes more important. Currently, commonly used methods for forming isolation regions mainly include a local oxidation isolation (LOCOS) process and a shallow trench isolation (shallow trench isolation, STI) process. [0003] Compared with the local oxidation isolation (LOCOS) process, the trench isolation technology has a number of electrical isolation advantages, including reducing the area occupied by the silicon wafer surface while increasing the inte...

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Problems solved by technology

[0007] However, if figure 2 As shown, the problem existing in the existing subatmospheric pressure chemical vapor deposition method is that the conformal growth characteristic of the subatmospheric pressure chemical vapor deposition film is mainly to fill the trench 20 by growing from the sidewall 22 of the trench 20 to the middle, so The sensitivity to the profile of the etched trench 20 is very high. If the etched trench 20 is recessed into the sidewall 22, a band will eventually be formed in the tight seam (seam) 50 formed in the middle of the trench 20 of the semiconductor substrate 10. The gap 51 of the hole, and the defect of the gap 51 cannot be removed by annealing, and is easily corroded by the solution in the subsequent cleaning step, resulting in the connection of the trench, reducing the isolation function of the trench, and causing a short circuit between subsequent semiconductor devices

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