High voltage mos transistor structure and its manufacturing method in bcd process

Abstract

The invention provides a high pressure MOS transistor structure in a BCD technology and a manufacturing method thereof. The high pressure MOS transistor structure in the BCD technology comprises: a first doping-type semiconductor substrate; a second doping-type buried layer, which is located in the semiconductor substrate; a second doping-type semiconductor layer, which covers the semiconductor substrate and the buried layer; first doping-type traps and second doping-type traps, which are parallely arranged in the semiconductor layer; field oxides, which are located in the doping-type traps; a gate medium layer, which covers the semiconductor layer; a gate electrode, which is located on the gate medium layer and the field oxides; a source region, which locates in the second doping-type traps of the a first side of the gate electrode; a drain region, which is located in the first doping-type traps of a second side of the gate electrode. The high pressure MOS transistor structure of theinvention can be compatible with the BCD technology. A problem of low doping concentration caused by adsorption of the field oxides to a P type ion can be avoided.

Description

technical field [0001] The invention relates to BCD semiconductor process technology, in particular to a high-voltage MOS transistor structure in the BCD process and a manufacturing method thereof. Background technique [0002] The BCD process is a monolithic integration process technology that can manufacture Bipolar, CMOS and DMOS devices on the same chip, referred to as the BCD process. Since the BCD process combines the respective advantages of the above three devices, this makes the BCD process a mainstream process technology for integrated circuits. [0003] The BCD process can select different devices for different circuits to optimize the corresponding electronic circuit devices, and realize the requirements of low power consumption, high integration, high speed, and high driving capability of the entire circuit. The BCD process is a good choice for IC manufacturing processes such as power management, display drivers, and automotive electronics, and has broad market...

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Problems solved by technology

[0005] But, there is following problem in the compatibility of above-mentioned method and BCD process: 1, described PMOS transistor, it makes N-type buried layer earlier, then makes P-type buried layer in N-type buried layer, then P-type buried layer region needs The N-type buried layer in this region is formed after inversion, and a higher dose is required for the formation of the P-type buried layer. In the BCD process, if the dose of the P-type buried layer is higher, self-doping will occur during epitaxy. And the higher the dose of the P-type buried layer, the more obvious the self-doping phenomenon, which will lead to abnormal epitaxial concentration distribution, and then cause abnormal device parameters; 2. The P-type drift region of the PMOS transistor uses a P-type upper epitaxial layer. The PMOS transistor is used in the BCD process. Because the concentration of the epitaxial layer in the BCD process is low, the concentration of the P drift region is low. When the field oxide layer is grown, due to the "boron absorption and phosphorus discharge" effect of the oxide layer, It is easy to form an N-type inversion layer under the field oxide layer in the P drift region, resulting in device failure

The above methods have poor compatibility with the BCD process and cannot be well applied to the BCD process

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