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Manufacturing method of polysilicon P type well in N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor)

A manufacturing method and polysilicon technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of reducing device density, decreasing breakdown voltage, increasing layout area, etc., so as to improve device density and increase breakdown voltage. , the effect of reducing the layout area

Active Publication Date: 2013-10-23
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] The first manufacturing method of the sinker well of the existing RF LDMOS is to perform high-dose implantation and high-temperature advancement on the sinker region after the formation of the epitaxial layer. However, for applications with high withstand voltage requirements and large epitaxial layer thickness, It is difficult to make the source electrode and the substrate well connected by the method of implantation and propulsion, and a narrow region with low concentration will be formed deep in the sink well, making the resistance of the sink well high
The second method of manufacturing sinker wells of existing radio frequency LDMOS is to perform sinker implantation while forming an epitaxial layer, and advance the method after the epitaxial layer is formed. Although the aforementioned problems can be solved, due to the high concentration of sinker impurities, When the epitaxial layer grows, more sinker impurities will volatilize into the device cavity, and the inside of the drift region will be self-doped, so that a P-type impurity layer with a higher concentration will be formed inside the drift region, which will seriously affect the breakdown of the device. characteristic, resulting in a drop in breakdown voltage
In addition, in the above-mentioned existing manufacturing method, the sinker well is formed by implantation and propulsion, and the lateral diffusion of impurities may affect the channel region. Therefore, the distance between the sinker well region and the channel region is relatively large during layout design, which will Increase the layout area and reduce the device density, which is not conducive to obtaining high-performance devices

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  • Manufacturing method of polysilicon P type well in N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor)
  • Manufacturing method of polysilicon P type well in N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor)
  • Manufacturing method of polysilicon P type well in N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor)

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Embodiment Construction

[0022] figure 2 It is a flow chart of the method of the embodiment of the present invention; as Figure 3 to Figure 8 Shown is a schematic diagram of the device structure in each step of the method of the embodiment of the present invention. The method for manufacturing a polysilicon P-type sinker well in an N-type radio frequency LDMOS in an embodiment of the present invention includes the following steps:

[0023] Step 1, such as image 3 As shown, a P-type epitaxial layer is formed on a P-type silicon substrate, and a V-shaped groove is etched in the sinker well region on the P-type epitaxial layer. The doping impurity of the P-type epitaxial layer is boron, and the concentration of the impurity body is 1.0E14cm -3 ~1.0E15cm -3 , the thickness of the P-type epitaxial layer can be adjusted according to the withstand voltage requirement of the device, and the relationship between the thickness of the P-type epitaxial layer and the withstand voltage of the device is 15V / μ...

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Abstract

The invention discloses a manufacturing method of a polysilicon P type well in an N type radio frequency LDMOS(laterally-diffused metal oxide semiconductor), comprising the following steps of: forming a P type epitaxial layer on a P type silicon substrate and etching a V-groove; forming a first oxide layer on the side wall of the V-groove; depositing a first layer of polysilicon on the silicon substrate and performing ion implantation of P type dopant; depositing a second layer of polysilicon on the first layer of polysilicon and fully filling the V-groove; grinding to level the surface of the polysilicon; forming a second oxide layer as a protective layer outside a well region on the silicon substrate; annealing and propelling the P type dopant into the polysilicon of the whole V-groove and forming the polysilicon P type well; and forming the P well, drift region, source, gate and drain of the N type radio frequency LDMOS. The method disclosed by the invention can improve the breakdown voltage of a device, reduce the layout area and improve the density of a device, and has strong adjustability of process parameters and wide range of application.

Description

technical field [0001] The invention relates to a manufacturing process method of a semiconductor integrated circuit, in particular to a manufacturing method of a polysilicon P-type sink well in an N-type radio frequency LDMOS. Background technique [0002] In the existing RF LDMOS process, in order to reduce the wiring inductance and resistance of the source, increase the RF gain of the common source amplifier, reduce the unfavorable parasitic parameters caused by the source wiring and further reduce the layout area, a heavily doped The sinker connects the source to the grounded substrate to improve device performance. Such as figure 1 Shown is a schematic structural diagram of an existing N-type radio frequency LDMOS. The existing radio frequency LDMOS is formed in a P- epitaxial layer on a P+ substrate, a P+ sink well is formed in the P- epitaxial layer, and a P well is formed in the P- epitaxial layer and the P+ sink well Above, a gate is formed on the P well, and a c...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/74H01L21/316
Inventor 钱文生韩峰
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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