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Method for forming impurity layer, exposure mask and method for producing solid-state imaging device

A technology of a solid-state imaging device and a manufacturing method, which is applied in the direction of photolithographic process exposure device, semiconductor/solid-state device manufacturing, electric solid-state device, etc., can solve the problems of long-term and hindering the productivity improvement of solid-state imaging device, and achieve the effect of improving productivity

Inactive Publication Date: 2015-04-22
KK TOSHIBA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0005] In this way, in the past, a deep impurity layer was formed through multiple ion implantation processes or a long-term thermal diffusion process, so it was difficult to form such a deep impurity layer in a short time.
Therefore, in the case of a solid-state imaging device such as a CMOS sensor or a CCD sensor, it takes a long time to form a pixel isolation layer or a well layer, and this becomes an important factor hindering productivity improvement in the manufacture of a solid-state imaging device.

Method used

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  • Method for forming impurity layer, exposure mask and method for producing solid-state imaging device
  • Method for forming impurity layer, exposure mask and method for producing solid-state imaging device
  • Method for forming impurity layer, exposure mask and method for producing solid-state imaging device

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no. 1 approach

[0070] Figure 10 It is an enlarged plan view schematically showing a pixel portion of a CMOS solid-state imaging device manufactured by applying the above impurity layer forming method and grating mask. Such as Figure 10 As shown, the pixel unit of this solid-state imaging device is composed of a plurality of pixels 30 arranged in a grid. Each of these pixels 30 is formed by stacking a photoelectric conversion unit, a microlens, and the like. In addition, a wiring layer, a planarization layer, a color filter layer, and the like may be formed between the photoelectric conversion portion and the microlens.

[0071] Figure 11 is along figure 1 A cross-sectional view of the pixel part along the dashed-dotted line Z-Z'. Such as Figure 11 As shown, the pixel portion of the CMOS solid-state imaging device is formed on the P-type silicon substrate 31 . That is, an N-type base layer 32 is formed on the surface of a P-type silicon substrate 31, and on the surface of the N-typ...

no. 2 approach

[0093] Figure 17The pixel portion of a CCD-type solid-state imaging device manufactured by applying the above impurity layer forming method is enlarged and schematically shown, corresponding to Figure 11 cross-sectional view. In addition, since the plan view of the pixel portion of the solid-state imaging device and Figure 10 are the same, so illustrations and descriptions are omitted.

[0094] Such as Figure 17 As shown, the pixel portion of the CCD-type solid-state imaging device is formed on an N-type silicon substrate 50 . That is, on the surface of the N-type silicon substrate 50 , the P-type well layer 51 is formed in a region from the surface of the substrate 50 to the deep portion. The P-type well layer 51 is formed to have a surface area of, for example, about 60 to 70% of the surface area of ​​the silicon substrate 50 . On the surface of the well layer 51, a plurality of photoelectric conversion portions 52 composed of N+-type impurity layers are formed in a...

no. 3 approach

[0117] Compared with the manufacturing method of the solid-state imaging device of the second embodiment, the manufacturing method of the solid-state imaging device according to the third embodiment is a manufacturing method of the solid-state imaging device having the well layer 60 in such a manner that the pixel sensitivity is improved Control the ion concentration in the depth direction. Therefore, the solid-state imaging device manufactured by the manufacturing method of the solid-state imaging device according to this embodiment is different from the Figure 10 and Figure 17 same.

[0118] Below, refer to Figure 24 to Figure 27 A method of manufacturing the solid-state imaging device according to the third embodiment will be described. Figure 24 It is an enlarged plan view showing a part of the grating mask 61 applied to the manufacturing method of the solid-state imaging device. also, Figure 25 to Figure 27 is used to describe the method of manufacturing the sol...

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Abstract

A method for forming an impurity layer, includes forming a resist material 16 on a surface portion of a semiconductor substrate 15; exposing the resist material using a grating mask 10 comprising a light transmission region 11 including a plurality of unit light transmission regions 14 being arranged two-dimensionally, each being composed of a plurality of minute partial sections 13A to 13D having different transmittance; forming a resist layer 18 on the surface of the semiconductor substrate 15 by developing the exposed resist material, the resist layer including a thin film region 17 having a film thickness corresponding to the transmittance of the light transmission region; implanting ions to the semiconductor substrate 15 via the thin film region; and diffusing ion groups 21A′, 21B′, 21C′, and 21D′ that are implanted at the same depth such that the ion groups are coupled in a lateral direction.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS: This application is based on and claims priority from Japanese Priority Patent Application No. 2010-210930 filed on September 21, 2010, the entire contents of which are incorporated herein by reference. technical field [0002] Embodiments of the present invention relate to a method for forming an impurity layer, an exposure mask, and a method for manufacturing a solid-state imaging device. Background technique [0003] In general, a semiconductor device having a deep impurity layer is known. For example, a pixel separation layer in a CMOS sensor or a well layer in a CCD sensor is an impurity layer that needs to be formed at least deeper than the photoelectric conversion portion. [0004] Ion implantation is performed multiple times by changing the accelerating voltage of the ions so as to have multiple concentration peaks in the depth direction, thereby forming these deep impurity layers such as the pixel isolation layer or th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/146H01L21/314G03F1/62G03F7/20
CPCG03F1/28H01L27/14683
Inventor 富田健小原悦郭
Owner KK TOSHIBA