Transfer plate with metal vertical interconnection structure and manufacture method thereof

A technology of vertical interconnection and manufacturing method, applied in the field of three-dimensional stacking, can solve the problems of complex process and high cost of manufacturing three-dimensional stacked chips, and achieve the effects of simplified process steps, simple structure and convenient operation.

Active Publication Date: 2012-04-18
NAT CENT FOR ADVANCED PACKAGING
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AI-Extracted Technical Summary

Problems solved by technology

[0009] The technical problem to be solved by the present invention is to provide a new adapter plate with a metal vertical interconnection structure and its ...
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Abstract

The invention discloses a transfer plate with a metal vertical interconnection structure and a manufacture method thereof. The transfer plate comprises a base plate, a passivation layer, a metal salient point structure and a metal interconnection wire, wherein the passivation layer is formed at the lower surface of the base plate, and the metal salient point structure is formed at the lower surface of the passivation layer. The metal salient point structure comprises a welding disc and a metal salient point, wherein the welding disc is buried inside the passivation layer, the metal salient point is formed on the lower surface of the welding disc, one part of the metal salient point is buried inside the passivation layer, and the other part of the metal salient point is exposed out of the lower surface of the passivation layer. The metal interconnection wire extends from the upper surface of the base plate to the lower surface of the base plate, penetrates through the whole base plate and passes through the passivation layer and the welding disc until reaching the inside of the metal salient point, so the metal salient point is electrically connected with devices arranged above the base plate through the metal interconnection wire. The transfer plate and the manufacture method have the advantages that the process is simple, the cost is low, and a high hole making qualified rate is realized, so the problems of high hole filling cost, complicated process and the like of the metal vertical interconnection structure are solved.

Application Domain

Technology Topic

Hole makingMetal +2

Image

  • Transfer plate with metal vertical interconnection structure and manufacture method thereof
  • Transfer plate with metal vertical interconnection structure and manufacture method thereof
  • Transfer plate with metal vertical interconnection structure and manufacture method thereof

Examples

  • Experimental program(2)

Example Embodiment

[0043]
[0044] First, refer to figure 1 The first embodiment of the metal vertical interconnection structure applied to three-dimensional stacked chips disclosed in the present invention will be introduced. This embodiment 1 is a specific structure when the present invention is applied to an interposer.
[0045] In such figure 1 The shown transition board structure includes a substrate 101. In this embodiment, the material of the substrate 101 is glass, but it can also be silicon or organic material. There is a passivation layer 102 on the lower surface of the substrate 101. The material of the passivation layer 102 is polyimide in this embodiment. There is a metal bump structure on the lower surface side of the passivation layer 102. The metal bump structure includes a pad 104 buried in the passivation layer 102. There is a metal bump 103 on the lower surface of the pad 104. . In this embodiment, the pad 104 is made of metal aluminum. In this embodiment, the material of the metal bump 103 may be tin-silver-copper alloy solder, but the alloy solder may also be an alloy solder among tin-silver, tin-silver-copper, tin-indium, and indium-bismuth. In addition, the metal bump 103 may also be made of pure metal, such as tin, silver, copper, indium, bismuth, tungsten, nickel, iron, cobalt, aluminum, chromium, platinum, gold, palladium, and titanium. A part of the metal bump 103 is placed in the passivation layer 102, and the other part is exposed on the lower surface of the passivation layer 102.
[0046] A metal interconnection 105 extends from the upper surface to the lower surface of the substrate 101, runs through the entire substrate 101, passes through the passivation layer 102 and the pad 104, and reaches the inside of the metal bump 103 so that the metal bump 103 passes through the metal interconnection. The wire 105 is electrically interconnected with a semiconductor device (not shown in the figure) on the substrate 101. The material of the metal interconnection line 105 is preferably copper, but may also be silver, tin, tungsten, nickel, iron, cobalt, aluminum, chromium, platinum, gold, palladium, titanium or alloys thereof.
[0047] The metal interconnection 105 may be ring-shaped or cylindrical. The ring-shaped metal interconnection line is to make a thin metal layer on the sidewall of the hole when the metal interconnection line is made; while the columnar metal interconnection line is that the hole is completely filled with metal when the interconnection line is made. In this embodiment 1, a columnar interconnection line is used.
[0048] A seed layer 106 is surrounded on the outer sidewall of the metal interconnection 105 (on the side close to the substrate material), and the seed layer 106 is formed during the manufacturing process of the metal interconnection 105.
[0049] In order to realize embodiment 1 figure 1 The described structure, refer to below figure 2 The manufacturing method of Embodiment 1 of the metal vertical interconnection structure applied to the three-dimensional stacked chip is described, so that the above-mentioned metal vertical interconnection structure applied to the three-dimensional stacked chip can be further understood. The manufacturing method of this embodiment is a specific manufacturing method when the present invention is applied to an interposer:
[0050] In step P01, 4-inch glass is selected as the substrate 101.
[0051] In step P02, a standard bump manufacturing process is used to fabricate metal bumps. That is, first, a 3 micrometer thick polyimide is spin-coated on the surface of the substrate 101 as the passivation layer 102, and then metal is sputtered to form the pad 104. In this embodiment 1, aluminum is sputtered to form the pad 104, and the size of the pad 104 is a circle with a diameter of 100 microns. Then, 3 micrometers thick polyimide is spin-coated to bury the pad 104 in the passivation layer 102. After that, a 60-micron bump opening is made under the pad 104, and the seed layer is sputtered. In the first embodiment, nickel, titanium, and copper are sputtered as the seed layers of the metal bumps 103, respectively, with thicknesses of 0.5 μm, 0.5 μm, and 1 μm. Finally, the metal is electroplated, and a reflow process is performed to complete the production of the metal bumps (103). In the present embodiment 1, copper pillars are obtained by electroplating metal copper, the diameter and height of which are 80 microns and 50 microns, respectively.
[0052] Step P03, using laser ablation technology to make a hole with a diameter of 50 microns on the substrate 101. The hole extends from the upper surface of the substrate 101 to the lower surface, and penetrates the passivation layer 102 and the pad 104 to the inside of the metal bump 103 So far, the ablation depth of the metal bump 103 is controlled at about 10-30 microns.
[0053] Step P04, respectively sputtering metal titanium with a thickness of 0.2 μm and metal copper with a thickness of 1 μm as the seed layer 106, and finally electroplating metal filling holes to form the metal interconnection 105, completing the fabrication of the transfer board. In the first embodiment, copper electroplating forms the metal interconnection 105. The finished adapter board is like figure 1 Shown.

Example Embodiment

[0054]
[0055] image 3 The metal vertical interconnection structure applied to a three-dimensional stacked chip according to Embodiment 2 of the present invention is depicted. Specifically, the second embodiment is also a specific structure when the present invention is applied to an interposer.
[0056] In such image 3 The interposer board shown includes a substrate 206. In the second embodiment, the substrate 206 is a 4-inch silicon wafer with a thickness of 200 microns. Optionally, the material of the substrate 206 may also be glass or organic material. There is a passivation layer 205 on the lower surface of the substrate 206. There is a metal bump structure in the passivation layer 205, a part of the metal bump structure is embedded in the passivation layer 205, and the other part protrudes from the lower surface of the passivation layer 205.
[0057] Specifically, the metal bump structure includes a pad 204, an underlying metal layer 203, a metal pillar 202, and a solder 201. Among them, the material of the pad 204 in the second embodiment is aluminum, the material of the bottom metal layer 203 is a layer of nickel and a layer of copper, the material of the metal pillar 202 is copper, and the solder 201 can be a tin-silver-copper alloy solder. However, similar to Embodiment 1, the solder 201 may also be an alloy solder among tin-silver, tin-silver-copper, tin-indium, and indium-bismuth, and the metal pillar 202 may also be made of other metal materials, such as tin, silver, Copper, indium, bismuth, tungsten, nickel, iron, cobalt, aluminum, chromium, platinum, gold, palladium, titanium.
[0058] The interposer board also includes a metal interconnection line 702. In this embodiment, the metal interconnection line 702 is copper. The metal interconnection line 702 penetrates the substrate 206, the metal pad 204, the bottom metal layer 203 and part of the metal pillar 202 to reach the inside of the metal pillar 202. An insulating layer 501 is provided on the peripheral sidewall of the metal interconnection line 702 and the upper surface of the substrate. There is also a seed layer 701 between the metal interconnection line 702 and the insulating layer 501, and the seed layer 201 is formed during the manufacturing process of the interposer board. The insulating layer 501 on the upper surface of the substrate 206 further includes a surface passivation layer 903, a redistribution layer 901 and a metal pad 902. The surface passivation layer 903 is used for electrical insulation between the redistribution layer 901 and the metal pad 902 and the substrate 206. The metal interconnection line 702 is connected to the metal pad 902 through the redistribution layer 901, and finally an adapter board can be realized Three-dimensional interconnection.
[0059] In order to realize the example 2 image 3 The described structure, refer to below Figure 4 to Figure 13 The manufacturing method of the interposer board with the metal vertical interconnection structure of the second embodiment is described, so that the metal vertical interconnection structure applied to the three-dimensional stacked chip as described above can also be further understood. The manufacturing method of the adapter board includes the following steps, such as Figure 4 Shown.
[0060] In step S01, a substrate is selected. In this embodiment, a 4-inch silicon wafer is selected as the substrate 206, and a wafer thickness is selected as 200 microns. Optionally, the material of the substrate 206 may also be glass or organic material.
[0061] Step S02, forming a passivation layer 205 and a metal bump structure on the substrate 206. The metal bump structure includes a pad 204, an underlying metal layer 203, a metal pillar 202 and a solder 201. Specifically, first, the polymer material constituting the passivation layer 205 is spin-coated on the lower surface of the substrate 206, then the metal is sputtered to form the pad 204, and then the metal is sputtered to form the underlying metal layer 203, and then electroplated The metal pillar 202 and the solder 201 are fabricated by the method, and finally the passivation layer material is spin-coated and the metal bump structure is obtained through the reflow method, so that the pad 204 and part of the bottom metal layer 203 are located inside the passivation layer 205, and the metal bump The other part of the structure is exposed on the lower surface of the passivation layer 205. In this embodiment, the material of the passivation layer 205 is polyimide, the material of the pad 204 is aluminum, the material of the bottom metal layer 203 is a layer of nickel and a layer of copper, and the metal pillar 202 is copper composed of copper. The pillar, the solder 201 may be a tin-silver-copper alloy solder. However, similar to Embodiment 1, the solder 201 may also be an alloy solder among tin-silver, tin-silver-copper, tin-indium, and indium-bismuth, and the metal pillar 202 may also be made of other metal materials, such as tin, silver, Copper, indium, bismuth, tungsten, nickel, iron, cobalt, aluminum, chromium, platinum, gold, palladium, titanium. In addition, in this embodiment, the size of the metal bump structure is 100 microns in diameter, the height of the copper pillar 202 is 50 microns, and the height of the solder 201 is 20 microns, such as Figure 5 Shown.
[0062] Step S03, on the substrate 206, a temporary bonding carrier board 302 is bonded with a temporary bonding glue 301. In this embodiment, a 4-inch glass wafer is selected for the temporary bonding carrier 302, and benzocyclobutene (BCB) is selected for the temporary bonding adhesive, such as Image 6 Shown.
[0063] In step S04, the upper surface of the substrate 206 (the side where the temporary bonding carrier 302 is not bonded) is thinned and polished to reduce the thickness of the substrate 206 to 100 microns. In this embodiment, chemical mechanical polishing equipment is used to thin the substrate.
[0064] Step S05, making TSV holes 401 on the substrate. In this embodiment, in order to save processing costs, the TSV hole is made by laser drilling, but in order to accurately control the size and shape of the TSV hole, dry etching can also be selected in this step. In this embodiment, the TSV aperture is 60 microns, and the substrate 206 is etched to reach the surface of the temporary bonding adhesive layer 301 during etching, such as Figure 7 Shown.
[0065] In step S06, the TSV hole is filled with a polymer material by a spin coating method. In this embodiment, the filled polymer material is a polyimide material. During spin coating, the upper surface of the substrate 206 is also covered with the polymer material, and its thickness is required to be greater than 5 microns, such as Figure 8 Shown.
[0066] In step S07, laser drilling is performed from the upper surface of the substrate 206 and from the position with the metal bump structure to obtain a hole 601, and the depth of the hole 601 reaches the inside of the metal pillar 202 of the metal bump structure. In this embodiment, the depth of the laser drilling is required to go deep into the copper pillar 10 to 20 microns, the hole diameter is 40 microns, and the polymer material layer is retained on the sidewall of the hole 601, so that the polymer material of the sidewall The layer and the polymer material layer on the upper surface of the substrate 206 together constitute the insulating layer 501. In this embodiment, the thickness of the insulating layer 501 on the sidewall of the hole 601 is 10 microns, such as Picture 9 Shown.
[0067] Step S08, filling the hole 601 with a metal material. In this embodiment, the filling of the metal material includes two sub-steps. The first step is to sputter the seed layer 701, using titanium and copper as the seed material successively, where the thickness of titanium is 150 nanometers and the thickness of copper is 1000 nanometers. ; The second step is to electroplate metal materials to form metal interconnects 702. In this embodiment, the material of the metal interconnection junction 702 is copper. The electroplating process requires no defects and full filling, such as Picture 10 Shown. Optionally, the method of filling the holes can also be electroless plating.
[0068] In step S09, the upper surface of the adapter plate is flattened, and the surface 801 is polished. In this embodiment, a chemical mechanical polishing method is used for leveling operations, such as Picture 11 Shown.
[0069] In step S10, a surface passivation layer 903, a redistribution layer 901 and a metal pad 902 are fabricated. The material of the surface passivation layer 903 is selected from polyimide, such as Picture 12 Shown. The surface passivation layer 903 is used for electrical insulation between the redistribution layer 901 and the metal pad 902 and the substrate 206. The metal interconnection line 702 is connected to the metal pad 902 through the redistribution layer 901, and finally an adapter board can be realized Three-dimensional interconnection.
[0070] Step S11, remove the temporary bonding carrier plate 302, and complete the production of the adapter plate, such as Figure 13 Shown. The method for removing the temporary bonding carrier board 302 is to first heat the temporary bonding carrier board 302 to soften the temporary bonding glue 301, and then apply a force parallel to the bonding surface direction on the substrate 206 and the temporary bonding carrier board 302 , The substrate 206 and the temporary bonding carrier 302 are staggered and separated.
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PUM

PropertyMeasurementUnit
Thickness10.0µm
Thickness150.0nm
Thickness1000.0nm
tensileMPa
Particle sizePa
strength10

Description & Claims & Application Information

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