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Semiconductor device and forming method thereof

A technology of semiconductors and devices, which is applied in the field of semiconductor devices and their formation, and can solve problems such as increased resistance and capacitance delays and reduced AC performance of devices

Active Publication Date: 2014-07-16
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

As a result, the resistance-capacitance delay increases and the AC performance of the device decreases

Method used

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  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof
  • Semiconductor device and forming method thereof

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Embodiment Construction

[0039] The disclosure below provides many different embodiments or examples for realizing the technical solution provided by the present invention. Although components and arrangements of specific examples are described below, they are examples only and are not intended to limit the invention.

[0040] Furthermore, the present invention may repeat reference numerals and / or letters in different embodiments. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0041] Examples of specific processes and / or materials are provided herein. However, alternative applications of other processes and / or other materials that can be realized by those skilled in the art obviously do not depart from the scope of protection of the present invention. It should be emphasized that the relationship between the various structures described in this document includes necessary extensions due to ...

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Abstract

The invention discloses a semiconductor device and a forming method thereof. The semiconductor device comprises a semiconductor base body, a source region, a drain region, grids and back gates, wherein the semiconductor base body is arranged on an insulating layer and the insulating layer is arranged on a semiconductor substrate; the source region and the drain region are connected to two opposite first sides of the semiconductor base body; the grids are arranged on two opposite second sides of the semiconductor base body; and the back gates are arranged on the semiconductor substrate and are inlaid in the insulating layer and the semiconductor base body. According to the invention, the threshold voltage of the semiconductor device can be adjusted by reducing the short channel effect, the source and drain region resistance and parasitic capacitance in the semiconductor device.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, in particular to a semiconductor device and a forming method thereof. Background technique [0002] As the channel length of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) continues to shorten, a series of effects that can be ignored in the MOSFET long channel model become more and more significant, and even become the dominant factor affecting performance. This phenomenon is collectively referred to as short channel effect. The short channel effect is easy to deteriorate the electrical performance of the device, such as causing a decrease in the gate threshold voltage, an increase in power consumption, and a decrease in the signal-to-noise ratio. [0003] In order to control the short channel effect, people have to dope more impurity elements such as phosphorus and boron into the channel. However, this will easily lead to a decrease in carrier mobility in the channel...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/423H01L29/06H01L21/336
Inventor 朱慧珑梁擎擎骆志炯尹海洲
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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