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MOS (metal oxide semiconductor) transistor and manufacturing method thereof

A technology of a MOS transistor and a manufacturing method, applied in the field of semiconductor design and manufacturing, can solve the problems of high process cost and long time consumption, and achieve the effects of shortening the process time, reducing the number of masks, and reducing the process cost

Inactive Publication Date: 2012-07-18
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The more photolithography times, the more masks may be needed, the longer it takes, and the higher the process cost

Method used

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  • MOS (metal oxide semiconductor) transistor and manufacturing method thereof
  • MOS (metal oxide semiconductor) transistor and manufacturing method thereof
  • MOS (metal oxide semiconductor) transistor and manufacturing method thereof

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Embodiment Construction

[0023] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.

[0024] figure 2 The structure of a MOS transistor according to an embodiment of the present invention is schematically shown.

[0025] Such as figure 2 As shown, a MOS transistor according to an embodiment of the present invention includes a well region 22 arranged in a substrate 2, a gate 1 arranged between a source and a drain 33, and a gate 1 arranged in the source-drain well region 22. The lightly doped region 44 between the source and the drain 33 , the source and the drain 33 arranged in the source-drain well region 22 .

[0026] which, with figure 1 The difference of the shown MOS transistor structure according to the prior art is that the upper surface of the source and drain 33 is lower than the lower surface of the gate oxide of t...

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PUM

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Abstract

The invention provides an MOS (metal oxide semiconductor) transistor and a manufacturing method thereof. According to the invention, the MOS transistor comprises a well region arranged in a substrate, a grid electrode arranged between a source electrode and a drain electrode, a light doped region positioned between the source electrode and the drain electrode in a source / drain well region, and the source electrode and the drain electrode arranged in the source / drain well region, wherein the upper surfaces of the source electrode and the drain electrode are lower than the lower surface of the grid electrode oxide of the grid electrode, and the light doped region is positioned below the grid electrode. According to the invention, the manufacturing method of the MOS transistor comprises the following steps of: coating photoresist on a substrate on which grid oxygen and polycrystalline silicon grow, and executing photoetching so as to form a source drain region; utilizing the photoresist to etch the polycrystalline silicon and the grid oxygen; utilizing the photoresist to etch a silicon substrate; and utilizing the photoresist to respectively carry out well injection, the light doped region injection and the source / drain injection.

Description

technical field [0001] The invention relates to the field of semiconductor design and manufacture, and more specifically, the invention relates to a MOS transistor and a manufacturing method thereof. Background technique [0002] MOS transistor is the abbreviation of metal-oxide-semiconductor (Metal-Oxide-SEMIconductor) structure transistor, which is divided into P-type MOS transistor and N-type MOS transistor. [0003] figure 1 The structure of a MOS transistor according to the prior art is schematically shown. [0004] like figure 1 As shown, the MOS transistor includes a source and a drain (identified as 3 ) arranged in a well 21 in a substrate 2 , and a gate 1 arranged between the source and the drain above the substrate. [0005] For the manufacture of MOS transistors according to the prior art, in the sense of a mask (also called a reticle), a MOS transistor usually requires: well 21 implantation, etching of polysilicon gate 1, lightly doped region 4 implants, and ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
Inventor 吴小利
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP