Embedded gate top surface contact field effect transistor structure and manufacturing method thereof

Abstract

The invention relates to an embedded gate top surface contact field effect transistor structure and a manufacturing method thereof. The transistor comprises a drain epitaxial layer, a surface metal layer which is located on the top layer and can be divided into a source metal pad and a gate metal pad, and an embedded source extension inverted fin and a gate which are located in the drain epitaxial layer. The gate is aligned to the source extension inverted fin, and symmetrical channels which are connected in parallel from the surface metal layer to the interior of the drain epitaxial layer in pairs are formed on the two sides of the gate respectively; by means of the design that the embedded source extension inverted finand the gate are in the same groove and are not in the same area, the source metal pad and the gate metal pad are individually conducted outside the mesa area, and the condition that the mesa area needs to be provided with a contact hole is avoided. The field effect transistor architecture provided by the invention has the effect of reducing the gate trench pitch to improve the electron current density.

Description

technical field [0001] The invention relates to the technical field of semiconductor transistors, in particular to a field-effect transistor structure and a manufacturing method thereof with embedded gate top surface contact. Background technique [0002] As the key and important device of the semiconductor chip, the field effect transistor structure has a variety of structures, mainly including the following types: FinFET fin field effect transistor, JFET junction field effect transistor, surface field effect transistor, tunneling field effect transistor Transistors trench gate field effect transistor, split gate field effect transistor and super junction field effect transistor. Among them, the structure of FinFET fin field effect transistor, JFET junction field effect transistor, surface field effect transistor and tunneling field effect transistor is to design the source contact and drain contact on the same surface of the semiconductor substrate. With the trend of thin...

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Problems solved by technology

[0005] The main purpose of the present invention is to provide a field effect transistor structure with buried gate top surface contact. Under the concept of contact hole partition processing, the main progress lies in the innovative transistor structure with source / drain and gate interleaved and stacked Solve the problem that the area of ​​the mesa area of ​​the field effect transistor is affected by the reduction of the area of ​​the contact hole, and can increase the arrangement density of the embedded gate in the mesa area to further reduce the gate pitch

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