Preparation method of graphite-based double-gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor)

A graphene and gate dielectric technology, used in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of graphene structure damage, catalytic metal waste, complex process flow, etc., to reduce production costs and reduce gate leakage. The effect of simple current and process flow

Inactive Publication Date: 2012-09-19
SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] In view of the above-mentioned shortcoming of the prior art, the purpose of the present invention is to provide a kind of preparation method of the dual-gate MOSFET based on graphene, for solving the complex technological process in the process of preparing the dual-gate MOSFET based on graphene in the prior art , the graphene structure damage and pollution caused by the transfer substrate during the preparation of graphene, and the shortcomings of the waste of catalytic metals

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  • Preparation method of graphite-based double-gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor)
  • Preparation method of graphite-based double-gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor)
  • Preparation method of graphite-based double-gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor)

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[0039] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0040] see Figure 2a to Figure 2g . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed a...

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Abstract

The invention provides a preparation method of a graphite-based double-gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor), belonging to the fields of microelectronics and solid electronics. The preparation method comprises the following steps: forming a high-quality SiO2 layer on a monocrystalline silicon substrate; coating a layer of high polymer in a spinning way on the SiO2 layer, wherein the high polymer is used as a carbon source for preparing graphite; depositing a catalytic metal layer on the high polymer and performing high temperature annealing so at to form graphite at the junction face of the SiO2 layer and the catalytic metal layer; windowing the catalytic metal layer and forming a source and a drain of the transistor by using photolithography and an etching process; depositing a layer of high-K film in the windowed area by using an atomic deposition system and preparing a front metal gate above the high-K film; and finally preparing a back metal gate on the back of the Si substrate to obtain a double-gate MOSFET device based on a graphite trench material and a high-K gate dielectric medium.

Description

technical field [0001] The invention relates to a preparation method of a double-gate MOSFET, in particular to a preparation method of a graphene-based double-gate MOSFET, belonging to the fields of microelectronics and solid electronics. Background technique [0002] With the continuous advancement of technology, the requirements for computer operating speed are also increasing. The development of current silicon-based integrated circuits is limited by its own materials. Continue to improve. Graphene material (2×10 5 cm 2 / V·s) has a ratio of silicon material (1.6×10 3 cm 2 / V·s) higher carrier mobility, and graphene is the most ideal material for the conductive channel in the transistor. Since electrons can run at 1 / 300 of the speed of light in graphene, which is much higher than in other media, electrons can be transported without being scattered, and the transistors prepared with it are smaller in size, faster in speed, Produces less heat and consumes less energy. ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336
CPCH01L29/1606H01L29/78684H01L29/78648H01L29/66742
Inventor 陈静余涛罗杰馨伍青青柴展
Owner SHANGHAI INST OF MICROSYSTEM & INFORMATION TECH CHINESE ACAD OF SCI
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