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High voltage power LDMOS device and manufacture method thereof

A high-power, high-voltage technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high manufacturing equipment requirements, epitaxial layer pattern distortion, and time-consuming problems, and achieves easy control of the process, doping The effect of increasing the amount of dopant and reducing the on-resistance

Active Publication Date: 2012-10-10
CSMC TECH FAB2 CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] These two methods of forming the drift region have their own disadvantages: the former requires a lot of time in addition to high requirements on manufacturing equipment, which brings difficulties to mass production, complicated process and high cost.
The latter has two problems due to the large thickness and low concentration of the epitaxial layer: first, the thick epitaxial layer will cause pattern distortion, which will cause difficulties in the lithography alignment of the subsequent process. Second, low-concentration epitaxy is difficult to control, causing key parameters such as breakdown voltage and on-resistance of high-voltage power LDMOS devices to fluctuate with fluctuations in epitaxy layer concentration
[0009] It can be seen from the above that the formation of high-voltage power LDMOS devices through the existing process has the disadvantages of complex process, high cost, difficult process control, and unstable key parameters such as breakdown voltage and on-resistance of the device.

Method used

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  • High voltage power LDMOS device and manufacture method thereof
  • High voltage power LDMOS device and manufacture method thereof
  • High voltage power LDMOS device and manufacture method thereof

Examples

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Embodiment 1

[0045] refer to figure 2 , figure 2 It is a schematic cross-sectional structure diagram of a high-voltage power LDMOS device provided by an embodiment of the present invention. The high-voltage power LDMOS device includes: a substrate 100; a graded drift region located in the substrate 100, the graded drift region includes a drain well region 202 and a source well region 201 of the same doping type, and the drain well region 202 It communicates with the source well region 201, and the depth of the drain well region 202 is greater than the depth of the source well region 201; the field oxide layer 108 is located on the gradient drift region.

[0046] In addition, the high-voltage power LDMOS device also includes: a buried layer region 103 located in the substrate 100; an active well region 105 located on the buried layer region 103, and the active well region 105 and the source terminal well region 201 Adjacent: the source region 113 in the active well region 105 ; the gate...

Embodiment 2

[0059] The high-voltage power LDMOS device provided by the present invention has been described in detail above, and the manufacturing method of the high-voltage power LDMOS device will be introduced below.

[0060] refer to Figure 4 , Figure 4 It is a schematic flow chart of the manufacturing method of the high-voltage power LDMOS device provided by the present invention. The method specifically includes:

[0061] Step S1: providing a substrate, the substrate including a bulk layer.

[0062] The base provided in this step includes a body layer (also called a substrate), on which an epitaxial layer needs to be formed subsequently, and the body layer and the epitaxial layer are collectively called a base. Related concepts such as "inside the substrate" and "on the substrate" will be involved in the subsequent steps. The "inside the substrate" refers to a region extending downward from the surface of the substrate to a certain depth, which is a part of the substrate; the "s...

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Abstract

The embodiment of the invention discloses a high voltage power LDMOS(Lateral Double-diffuse MOS)device and a manufacture method thereof. The said high voltage power LDMOS device includes: a substrate; a gradual change drift region which is located within the substrate, wherein a drain terminal well region and a source well region with same mixed type are connected with each other and the depth of the drain terminal well is deeper than that of the source well region, wherein the gradual change drift region comprises a drain terminal well region and a source terminal well region that have the same doping type and are communicated with each other, and the depth of the drain terminal well region is greater than that of the source terminal well region; and a filed oxidation layer is located above the gradual drift region. The high voltage power LDMOS device and the manufacture method thereof provided by the invention are advantaged by simple process and low cost. Besides, the process procedure is easily controlled, such that some key parameters such as the breakdown voltage and on-resistance of appliances can be steady.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, and more specifically, to a high-voltage power LDMOS device and a manufacturing method thereof. Background technique [0002] The manufacture of LDMOS (Lateral Double-diffuseMOS) devices mainly uses double-diffusion technology, and two boron-phosphorus diffusions are successively performed in the same active area. The difference in junction depth is used to precisely control the length of the channel. In LDMOS devices, there is a high-resistance layer between the source region and the drain region, which is called a drift region (drift). The existence of the drift region increases the breakdown voltage of the device, and reduces the parasitic capacitance between the source and the drain, which is beneficial to improve the frequency characteristics. At the same time, the drift region acts as a buffer between the channel and the drain, weakening the short-channel effect of the...

Claims

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Application Information

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IPC IPC(8): H01L29/06H01L29/78H01L21/336
Inventor 吴孝嘉张森朱坤峰
Owner CSMC TECH FAB2 CO LTD
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