Method for copper dual damascene structure having ultralow dielectric constant layer

Abstract

The invention discloses a method for a copper dual damascene structure having an ultralow dielectric constant layer. The method comprises the steps of providing a substrate; depositing an etching blocking layer, a first interlayer dielectric layer having a low dielectric constant, a first oxidation layer, a metal protection layer, a second oxidation layer and a first bottom anti-reflection layer sequentially on the substrate; etching a first groove and a first through-hole on the etching blocking layer, filling the first groove and the first through-hole with copper, conducting planarization treatment till the first interlayer dielectric layer, and forming a first metal layer; producing a second groove and a third groove on the first interlayer dielectric layer; and filling and depositing an ultralow dielectric constant material on the first groove, the second groove, the first interlayer dielectric layer and the first metal layer, forming a second interlayer dielectric layer, removing the ultralow dielectric constant material which covers the first dielectric layer and the first metal layer, and forming the first layer copper damascene structure. By the aid of the method, the mechanical performance of interlayer dielectric substances is good, and process integration is facilitated.

Description

Technical field [0001] The invention relates to the field of microelectronics, and in particular to a method of a copper double damascene structure with an ultra-low dielectric constant layer. Background technique [0002] Aluminum interconnect lines are widely used in the back-end interconnection of integrated circuits. The main reason is that it has good electrical conductivity, and at the same time aluminum has good adhesion to dielectric materials and semiconductor materials. However, with the further improvement of integration, the size of the wire is getting smaller and smaller, and the resistance of the aluminum wire is also higher. At the same time, it has been difficult to meet the requirements of high current density, so it has gradually transitioned to the copper wire. [0003] At the same time, due to the gradual increase of the capacitance resistance delay effect, the dielectric material has transitioned from silicon oxide (dielectric constant of about 4) to fluorosili...

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Problems solved by technology

[0005] Therefore, in the process of semiconductor processing, it is necessary to avoid the influence of dry etching on the ultra-lo

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