MEMS (micro-electromechanical systems) device and vacuum encapsulation method of wafer level thereof

[0021] The present invention will be further described below in conjunction with the drawings.

[0022] 1. MEMS device structure:

[0023] Such as figure 1 , figure 2 As shown, the MEMS device is composed of a silicon substrate layer 10, a silicon structure layer 15 and a silicon cap layer 12.

[0024] The surface of the silicon substrate 10 is etched to form a shallow cavity 8 so that a certain distance is formed between the movable structure 6 and the substrate to avoid hindering the movement of the movable structure. The silicon cap layer 12 etches the shallow cavity 9 and the lead through hole 13, and the shallow cavity 9 corresponds to the position and shape of the shallow cavity 8 on the silicon substrate. The surface of the silicon substrate 10 and the silicon cap 12 respectively have a certain thickness of an oxide layer 7 and an oxide layer 11, which are bonded to the silicon structure layer 15 to serve as insulation. The silicon structure layer 15 is composed of a movable structure 6, an electrical interconnection lead 5, an isolation groove 2, a bonding ring 1, a bonding ring 3, and a bonding area 4. The isolation groove 2 can realize electrical insulation between the electrical interconnection leads; The ring 3 and the bonding area 4 are an integral structure. When the cap is bonded, the bonding area 4 corresponds to the lead hole 13 of the silicon cap, and a circle around the lead hole 13 is the bonding area, namely the bonding ring 3. The aluminum electrode 14 is sputtered on the surface of the bonding area 4 to form a metalized bonding point.

[0025] 2. Wafer-level vacuum packaging process of MEMS devices:

[0026] image 3 The middle pictures (a)-(i) are schematic diagrams of the main process of MEMS devices, as follows:

[0027] Figures (a)-(b) are the fabrication of a silicon substrate: a cavity pattern is made on the silicon substrate 10 by a photolithography process, then a shallow cavity 8 is formed by ICP deep silicon etching process, and finally an oxidation process An oxide layer 7 with a certain thickness is formed on the surface.

[0028] Figure (c) is the direct bonding of the silicon structure layer and the silicon substrate: the silicon structure layer 15 is a low-resistance silicon wafer, and the silicon structure layer 15 and the silicon substrate layer 10 are bonded together using silicon-silicon direct bonding technology.

[0029] Figure (d) Thinning and polishing of the silicon structure layer: Use a chemical mechanical polisher (CMP) to thin the silicon structure layer 15 to the desired thickness, and then polish the surface.

[0030] Figure (e) is the movable structure and the electrical interconnection lead etching: the pattern of the movable structure 6 and the electrical interconnection lead 5 is formed by a photolithography process, the movable structure is released by ICP deep groove etching, and the electrical interconnection lead is formed by etching at the same time 5. The bonding area 4, the bonding ring 3, the bonding ring 1, and the isolation groove 2.

[0031] Figures (f)-(h) are the production of silicon caps: a shallow cavity 9 is formed on the lower surface of the silicon cap using photolithography and KOH etching processes; the pattern of the lead hole 13 is photoetched, and the lead hole is corroded by KOH etching solution; The surface is oxidized to produce an insulating layer 11 of a certain thickness.

[0032] Figure (i) is the bonding of the silicon cap and the silicon structure layer: using the principle of double-sided alignment, the silicon cap 12 and the silicon structure layer 15 are aligned, and the vacuum silicon-silicon direct bonding technology is used to realize the silicon cap 12 and the silicon structure layer 15 bond package.

[0033] figure 2 It is the metallization of the bonding point: the aluminum electrode 14 is sputtered in the lead hole by using a shadow mask sputtering process.

[0034] Through the above process flow, the MEMS device wafer-level vacuum packaging is realized.