Fabrication method of metal interconnection structure
A technology of a metal interconnection structure and a manufacturing method, which is applied in the manufacture of semiconductor/solid-state devices, electrical components, circuits, etc., can solve the problems of difficulty in manufacturing the metal interconnection structure, and achieve the effects of reduced size, simple and easy-to-control precision
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Embodiment 1
[0047] In this embodiment, two-dimensional intersecting lines are used as a mask to etch and form the metal interconnection structure to be formed in the present invention, including through holes and trenches.
[0048] provide as figure 1 The semiconductor structure shown includes a semiconductor substrate 100 and a dielectric layer 110 formed on the semiconductor substrate 100 . Wherein, the subsequent step is to form the metal interconnection structure of the present invention in the dielectric layer 110 . As an embodiment, there is a first buffer layer 202 on the dielectric layer 110, and a first patterned hard mask layer 321 is formed on the first buffer layer 202. The first pattern of the first patterned hard mask layer 321 is Due to the limitation of the schematic diagram of multiple parallel line-shaped graphics with a distance of k, only the cross-section of the first pattern facing the paper is shown. The second buffer layer 204 is covered between and on the line ...
Embodiment 2
[0067] In this embodiment, the process of the present invention is described in detail by taking the formation of the metal interconnection structure of the present invention as an example.
[0068] Its implementation mainly includes the following steps:
[0069] Step S11: providing a semiconductor substrate 100, such as Figure 8 .
[0070] Wherein, the semiconductor substrate 100 can be a bulk silicon substrate, or a silicon germanium substrate, a group III-V element compound substrate (such as gallium arsenide, indium phosphide, gallium nitride, etc.), a silicon carbide substrate or A stacked structure, or a silicon-on-insulator structure, or a diamond substrate, or other semiconductor substrates known to those skilled in the art. The semiconductor substrate 100 may include devices such as MOS transistors, and may also include metal wires for electrical connection, which is not limited in the present invention. In this embodiment, the semiconductor substrate 100 is a bul...
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