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Groove-preferential dual-damascene copper-connection method reducing redundant metal coupling capacitance

A redundant metal, trench-first technology, used in circuits, electrical components, semiconductor/solid-state device manufacturing, etc., to reduce etching steps, eliminate coupling capacitance, and expand the lithography process window.

Inactive Publication Date: 2013-08-21
SHANGHAI HUALI MICROELECTRONICS CORP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Its cost is much higher than traditional single exposure forming technology

Method used

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  • Groove-preferential dual-damascene copper-connection method reducing redundant metal coupling capacitance
  • Groove-preferential dual-damascene copper-connection method reducing redundant metal coupling capacitance
  • Groove-preferential dual-damascene copper-connection method reducing redundant metal coupling capacitance

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Embodiment Construction

[0032] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be described in detail below in conjunction with specific embodiments and accompanying drawings.

[0033] Figure 3A to Figure 3I Schematically shows a cross-sectional view of each step of the trench-priority dual damascene copper interconnection method for reducing redundant metal coupling capacitance according to a preferred embodiment of the present invention. The trench-first dual damascene copper interconnect method utilizes double exposure technology and formable hard film photoresist to reduce redundant metal coupling capacitance.

[0034] Specifically, as Figure 3A to Figure 3I As shown, the trench-priority double damascene copper interconnect method for reducing redundant metal coupling capacitance according to a preferred embodiment of the present invention includes:

[0035] The first step: first deposit a dielectric layer 2 on ...

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Abstract

The invention provides a groove-preferential dual-damascene copper-connection method reducing redundant metal coupling capacitance. A medium layer is firstly deposited on a substrate silicon wafer, and then first photoresist is coated on the medium layer. A metal groove structure is formed in a first photoresist film through exposure and development, and the metal groove structure formed in the first photoresist penetrates through the first photoresist. In an identical development machine stand, a miniature auxiliary film is coated on the first photoresist to solidify the figure of the metal groove structure in the first photoresist, the miniature auxiliary film and the surface of the first photoresist is made to react through heating to form an isolating film not soluble in second photoresist, and then the miniature auxiliary film which does not react with the surface of the first photoresist and is left is removed. The second photoresist is coated on the first photoresist with the isolating film. A through hole structure arranged in the metal groove structure and a redundant metal groove structure arranged on the first photoresist are formed in the second photoresist through the exposure and the development.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, and more specifically, the invention relates to a groove-priority double damascene copper interconnection method for reducing redundant metal coupling capacitance. Background technique [0002] As the integration level of semiconductor chips continues to increase, the feature size of transistors continues to shrink. After entering the 130nm technology node, limited by the high resistance characteristics of aluminum, copper interconnection gradually replaces aluminum interconnection and becomes the mainstream of metal interconnection. Since the copper dry etching process is not easy to realize, the manufacturing method of the copper wire cannot be obtained by etching the metal layer like the aluminum wire. The widely used manufacturing method of copper wire is damascene technology called damascene process. [0003] Damascus damascene copper interconnects can be realized through a varie...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/768H01L21/027
Inventor 毛智彪
Owner SHANGHAI HUALI MICROELECTRONICS CORP
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