Control system and control method of permanent magnet synchronous motor of series-connected cascade-type multi-level converter
A permanent magnet synchronous motor and drive control technology, which is applied to the speed/torque control of a single motor, and the conversion of irreversible DC power input to AC power output. The safety and comfort of energy electric vehicles can reduce the output harmonics and improve the quality of output power.
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specific Embodiment approach 1
[0026] Specific implementation mode one, see figure 1 Describe this embodiment, the permanent magnet synchronous motor drive control system of series cascaded multilevel converter described in this embodiment, it comprises driver 1, permanent magnet synchronous motor 3, signal conditioning circuit 4, DSP controller 5, Resolver 6, decoding circuit 7, man-machine interface 8, first current sensor P, second current sensor Q, DC power supply VCC, capacitor C0, resistor R1 and resistor R2,
[0027] The positive pole of the DC power supply VCC is simultaneously connected to one end of the capacitor C0, one end of the resistor R1 and the positive terminal of the DC input power supply of the driver 1, and the other end of the resistor R1 is simultaneously connected to one end of the resistor R2 and the bus voltage signal input of the DSP controller 5 The negative terminal of the DC power supply VCC is connected to the other terminal of the capacitor C1, the other terminal of the resis...
specific Embodiment approach 2
[0033] Specific Embodiment 2. This embodiment is further limited by the permanent magnet synchronous motor drive control system of the series cascaded multilevel converter described in the specific embodiment 1. The DSP controller 5 adopts a chip model of TMS320F2812 32 Bit DSP chip implementation.
specific Embodiment approach 3
[0034] Specific Embodiment Three. This embodiment is a further limitation of the permanent magnet synchronous motor drive control system of the series-cascaded multilevel converter described in the specific embodiment one. The model used in the decoding circuit 7 is AD2S90 or AD2S99 implementation of the decoding chip.
[0035] In this embodiment, AD2S90 is a dedicated chip produced by AD Company for digital processing of inductive synchronizer signals, which has the advantages of small size, simple structure, high reliability, easy debugging and outputting multiple signal modes.
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