Fin field effect transistor and manufacture method thereof

Abstract

The invention provides a manufacture method of a fin field effect transistor. The manufacture method comprises the following steps: forming hard mask patterns on a semiconductor substrate; patterning the semiconductor substrate with the hard mask patterns being as a mask and a plurality of fins are formed; forming dielectric layers in grooves enclosed by the fins and the semiconductor substrate; patterning the fins through wet etching, and the crystal faces, the corrosion rate of which is the lowest, of the fins are enabled to be exposed based on the different corrosion rate of chemical solution on different crystal faces of the fins in the wet etching; removing the hard mask patterns; and forming gates covered on the fins. Correspondingly, the invention also provides a fin field effect transistor comprising the semiconductor substrate, the fins on the semiconductor substrate, the dielectric layers formed on the semiconductor substrate between the fins, the crystal faces being the side walls of the fins exposed out of the dielectric layers, and the gates covered on the fins. According to the fin field effect transistor and the manufacture method thereof, the fin field effect transistor is allowed to have good electrical performance.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a fin field effect transistor and a manufacturing method thereof. Background technique [0002] In order to keep up with the pace of Moore's Law, people have to continue to shrink the feature size of MOSFET transistors. Doing so can bring benefits such as increasing chip density and improving the switching speed of MOSFETs. As the channel length of the device is shortened, the distance between the drain and the source is also shortened, so that the control ability of the gate to the channel becomes worse, and it is more difficult for the gate voltage to pinch off the channel. The larger the size, the more likely the subthreshold leakage phenomenon, the so-called short-channel effects (SCE: short-channel effects), will occur. [0003] For this reason, planar CMOS transistors are gradually transitioning to a three-dimensional (3D) Fin Field Effect Transistor (Fin Field ...

AI Technical Summary

Problems solved by technology

[0006] However, the current stability of the fin field effect transistor in the prior art is not good enough, which affects the electrical performance of the fin field effect transistor

Images