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Area determination device, observation device or inspection device, area determination method, and observation method or inspection method using the area determination method

A technology of inspection device and observation device, applied in measurement device, material analysis using wave/particle radiation, instrument, etc., can solve problems such as limited number of positions

Active Publication Date: 2016-08-24
HITACHI HIGH-TECH CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

CDSEM is the same as the review SEM described above. It is a device that uses electron beams and can obtain images with a resolution of several nanometers. However, it takes seconds to measure one position, so the number of positions that can be measured is limited.

Method used

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  • Area determination device, observation device or inspection device, area determination method, and observation method or inspection method using the area determination method
  • Area determination device, observation device or inspection device, area determination method, and observation method or inspection method using the area determination method
  • Area determination device, observation device or inspection device, area determination method, and observation method or inspection method using the area determination method

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no. 1 approach )

[0050] First, in this embodiment, a defect review system will be described as an inspection device equipped with an inspection (measurement) area for determining a sample to be inspected by a CDSEM, specifically, a pattern measurement, for process control in a photolithography process. function.

[0051] figure 1 It is an overall view of the inspection system according to the first embodiment of the present invention, and shows an overall view of the inspection system including the review SEM 1005 . An optical wafer inspection device 1001 , a CDSEM 1002 , a yield management server (YMS: Yield Management Server) 1003 , and a review SEM 1005 are connected via a network 1004 . The main parts constituting the review SEM 1005 include: the SEM main body 1006, which performs a series of processes of irradiating electron beams on a wafer as a sample mounted on a movable table to obtain an image; and a recipe storage unit 1007, which stores image acquisition conditions ( Acceleration...

no. 2 approach )

[0097] In the first embodiment, an example was shown in which a measurement region is extracted from defect candidates detected by a wafer inspection apparatus for a photolithography process. In a photolithography process, in general, a pattern to be observed is formed in a resist layer (single-layer resist). In addition, the main defects are shape defects such as pattern disconnection, short circuit, and thin / thickness, and the occurrence tendency thereof is characterized by a strong relationship with the local shape of the circuit pattern. In the second embodiment, an example will be described in which an inspection area as inspection position specifying information is determined for other processes, for example, wafer inspection performed after the etching process of various patterns is completed. In this case, it is assumed that the target defect types include not only shape defects but also various process defects. In the case of defect management on a process wafer with...

no. 3 approach )

[0114] In this embodiment mode, a mode obtained by expanding the first embodiment of the present invention which is aimed at a photolithography process will be described. In the first embodiment, an FEM wafer is inspected by a wafer inspection device, and the result is used as a candidate for a defect location to undergo SEM re-inspection. On the other hand, due to recent advances in process simulation technology, changes in the shape of circuit patterns when the process conditions of the wafer process are changed can be predicted by simulation to some extent. For example, in the photolithography process, if the design layout data of the circuit pattern, exposure conditions (focus and exposure amount), resist material, etc. are input to the exposure simulator, the predicted shape of the pattern to be exposed can be obtained. By making full use of this simulator, it is possible to predict changes in pattern shape due to process fluctuations, and even without wafer inspection, i...

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Abstract

The invention efficiently determines the partial area that needs to be inspected with high sensitivity and measured with high precision. The area determination device includes a calculation unit that uses at least one of defect data including defect positions on the sample obtained by photographing the inspection sample or images obtained from defect positions predicted to cause defects on the sample. A variety of defect attribute information is used to calculate the occurrence degree of defects; the area determination unit extracts defect data whose occurrence degree is above a predetermined level, and determines an area on the sample to be observed or inspected based on the extracted defect data.

Description

technical field [0001] The present invention relates to a wafer defect inspection and pattern measurement technique performed in a pre-process of forming a device pattern on a semiconductor wafer as a sample. Background technique [0002] Yield in the pre-process of semiconductor manufacturing is greatly affected by defects generated as a result of process abnormalities in various processes of wafer manufacturing, circuit pattern formation defects due to process fluctuations, and the like. [0003] Examples of generated defects include adhering foreign matter randomly generated on the wafer, scratches generated by wafer surface polishing, and the like. In addition, due to the difference in manufacturing conditions between the central part of the wafer and the peripheral part of the wafer in each process (such as the difference in the state of the plasma in the etching process, the difference in the heating state in the diffusion process, etc.), there is a problem that only o...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66G01N23/225
CPCG01N21/9501G01N2223/6116G01N23/2251H01L22/12
Inventor 中垣亮平井大博小原健二
Owner HITACHI HIGH-TECH CORP