Power device for improving morphology of diffusion region and manufacture method thereof

Abstract

The invention provides a power device for improving morphology of a diffusion region and a manufacture method thereof. The power device comprises a substrate, an epitaxial layer, a buried layer, and a source region. The buried layer between the source region and the epitaxial layer is a conducting channel region. A prediffusion region is formed in the epitaxial layer close to the conducting channel region. The power device further comprises a gate dielectric layer, a gate electrode, a dielectric layer, a front metal layer, a back diffusion region, and a back metal layer. According to the power device for improving morphology of the diffusion region, the prediffusion region enables the buried layer to be smoothly expanded towards the epitaxial layer so as to improve the morphology of the diffusion region at the edge of the channel, and optimize the electric field distribution of the power device under high temperature and high voltage. Therefore, the electric leakage level of the power device under high temperature and high voltage is reduced; and the thermal reliability of power devices such as MOSFET, IGBT, and the like can be substantially improved. The power device satisfies operating requirements in high temperature and large power environments. The manufacturing process of the power device is completely compatible with that of a conventional power device. The power device is simple in structure, convenient in manufacture, and has improved production efficiency and rate of finished products.

Description

technical field [0001] The invention belongs to the field of basic electrical components and relates to the preparation of semiconductor devices, in particular to a power device and a manufacturing method thereof which inject a layer of shallow low-concentration diffusion region to improve the morphology of the diffusion region after the gate oxide layer is completed. Background technique [0002] At present, the front-side process of power MOSFETs and IGBTs mainly includes the following steps: Taking devices prepared on N-type substrates as an example, on N-type substrates, the active region is first defined by photolithography technology, and then the gate oxide is grown. layer, and then inject N-type impurities to improve the J-FET effect of the device, then deposit polysilicon, define and etch the pattern with photolithography, and implant P-type ions in the area without polysilicon and gate oxide layer and drive them into the P-diffusion area In the P-diffusion area, th...

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Problems solved by technology

There is also a method to improve thermal reliability. The isolation layer between the gate region and the emitter is a composite film composed of silicon nitride and phosphorus-doped silicon nitride. Although this method can improve the thermal stability of the device, it does not Fundamentally solve the problems of unsatisfactory morphology of the diffusion area near the device surface, many recombination centers, and large leakage

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