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Non-volatilization resistance transformation type memorizer based on yttrium iron garnet and manufacturing method thereof

A technology of yttrium iron garnet and resistance transformation, which is applied in the direction of electrical components, etc., to achieve the effects of good compatibility, simple manufacturing process, and prevention of misreading

Active Publication Date: 2014-06-04
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

But currently Y 3 Fe 5 o 12 It has not been reported as a resistive storage medium

Method used

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  • Non-volatilization resistance transformation type memorizer based on yttrium iron garnet and manufacturing method thereof
  • Non-volatilization resistance transformation type memorizer based on yttrium iron garnet and manufacturing method thereof
  • Non-volatilization resistance transformation type memorizer based on yttrium iron garnet and manufacturing method thereof

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Embodiment Construction

[0037] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0038] like figure 1 shown, figure 1 It is a schematic structural diagram of a non-volatile resistance transition memory based on yttrium iron garnet provided by the present invention, the memory includes: an upper electrode 101; a lower electrode 102; and a yttrium iron garnet film 103 formed between the upper electrode and the lower electrode . Wherein, the material used for the upper electrode and the lower electrode is metal Ti or Pt or other conductive electrode materials. The yttrium iron garnet film is a polycrystalline yttrium iron garnet film with a thickness of 20 to 200 nm.

[0039] based on figure 1 For the non-volatile resistance transition type memory shown, the present invention also provides a preparation...

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Abstract

The invention discloses a non-volatilization resistance transformation type memorizer based on yttrium iron garnet. The memorizer comprises an upper electrode, a lower electrode and an yttrium iron garnet thin film which is formed between the upper electrode and the lower electrode. The non-volatilization resistance transformation type memorizer is characterized in that at a room temperature, the yttrium iron garnet thin film is of a polycrystalline structure, and a non-volatilization memory device which is small in size, high in density and stable in performance can be manufactured through the yttrium iron garnet thin film; Pt or Au is used as the upper electrode and the lower electrode of the device, and the device is a bipolar type switch resistive random access memory. The invention further discloses a manufacturing method of the non-volatilization resistance transformation type memorizer based on the yttrium iron garnet. The thin film material of the upper electrode and the thin film material of the lower electrode are manufactured through electron beam evaporating equipment, and the memory medium yttrium iron garnet thin film is manufactured through magnetron sputtering equipment. The non-volatilization resistance transformation type memorizer has the advantages of being simple in structure, easy to integrate, low in cost, compatible with a traditional silicon plane CMOS technology, beneficial to wide promotion and application, and the like.

Description

technical field [0001] The invention belongs to the technical field of microelectronic devices and memory, and in particular relates to a yttrium iron garnet (Y 3 Fe 5 O 12 ) non-volatile resistance transition memory and preparation method thereof. Background technique [0002] Traditional Flash memory is a silicon-based non-volatile memory based on polysilicon thin film floating gate structure, and this structure is facing the challenge of how to continue to shrink. According to the International Semiconductor Technology Development Roadmap (ITRS) in 2005, the traditional polysilicon floating gate memory can only continue to the 65nm technology node. This is mainly because the polysilicon film will cause tunneling oxide layers in the process of repeated erasing and writing. Therefore, in order to obtain high reliability, the thickness of the tunnel oxide layer must be kept above 9nm, and the corresponding read and write voltage must also be kept at a high level, which al...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L45/00
Inventor 闫小兵刘明龙世兵刘琦吕杭炳孙海涛
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI