A Method of Improving the Quality of Gate Oxide Layer

Abstract

The invention provides a method for improving quality of a gate oxide. The method is characterized by including the steps of providing a silicon substrate, removing a natural oxide layer on the surface of the silicon substrate through a wet cleaning process, continuing to place the silicon substrate into a furnace pipe to be oxidized at a high temperature so that the gate oxide can be formed on the surface of the silicon substrate, wherein a carbon fiber heating pipe serves as a heating source of the furnace pipe so that high-temperature oxidization can be conducted, the preset temperature of the furnace pipe at the wafer cassette loading waiting stage is set as T, and T ranges from 400 DEG C to 700 DEG C. The carbon fiber heating pipe serves as the heating source of the furnace pipe, and therefore time for waiting for temperature rise and temperature fall of a wafer cassette can be shortened, foreign oxide layers are prevented from growing, and quality of the gate oxide is effectively improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for improving the quality of a gate oxide layer. Background technique [0002] With the continuous development of chip technology, the thickness of the gate oxide layer becomes thinner and thinner, and the high-quality gate oxide layer becomes more critical. The high-quality gate oxide layer (Gate Oxide) is generally achieved through the high-temperature oxidation process of the furnace tube, the temperature range is usually between 750°C and 1000°C, and the reaction equation is: Si+O 2 → SiO 2 or Si+2H 2 O→SiO 2 +2H 2 . However, the silicon substrate will react with air oxygen at room temperature (Si+O 2 → SiO 2 ) to generate a natural oxide layer (<1.5nm). Before entering the furnace tube for high temperature oxidation, wet cleaning (using diluted HF) is required to remove the natural oxide layer. Since the silicon substrate reacts with ...

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Problems solved by technology

[0010] However, the above two patents do not involve how to control the thickness of the foreign oxide layer in the fabrication of the gate oxide layer on the silicon wafer, so as to improve the quality of the gate oxide layer

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