Layering and reconfigurable on-chip network modeling and simulation system
A network-on-chip and simulation system technology, which is applied in the field of hierarchical and reconfigurable network-on-chip modeling and simulation systems, can solve problems such as inability to study details of network-on-chip design, deviation between evaluation results and actual conditions, and high abstraction levels, and achieve fast Modeling and performance simulation, accurate and comprehensive performance evaluation, and the effect of improving versatility
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[0028] Hereinafter, the present invention will be described in detail through specific embodiments with reference to the accompanying drawings.
[0029] The hierarchical and reconfigurable network-on-chip simulation system of the present invention includes three levels: an operation layer, a main body layer and a test layer. It is used to model the key characteristics of the network-on-chip and perform statistical analysis of performance indicators. Its structure is as follows figure 1 Shown. The functional composition and relationship of each layer are described below.
[0030] (1) Operation layer, this layer is directly facing the users of the simulation platform. The users interact with the simulation model through the software configuration module, set the network topology, network scale, routing algorithm and other customized network structure on the chip according to the application requirements, and select the test traffic The distribution model, data packet length, network ...
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