PCB (printed circuit board) layout design method reducing differential crosstalk

Abstract

The invention provides a PCB layout design method reducing differential crosstalk. When a chip differential pin bonding pan and a differential pair perform coupling layout, chip pins and the differential pair are in opposite coupling polarity, and crosstalk noises correspondingly generated by the chip pins and the differential pair are in opposite polarity, so that when noise signals are superpositioned, due to the opposite amplitude polarity, most of noise energy is bound to offset due to mutual superposition, and further crosstalk noise can be effectively reduced. Compared with the prior art, the PCB layout design method reduces signal crosstalk by optimizing the layout mode, thereby improving the product quality and effectively reducing the crosstalk influence due to high-density interconnection of high-frequency signals. Meanwhile, the PCB layout design method reducing the differential crosstalk has the advantages of being reasonable in design, simple in structure, convenient to use and the like, thereby obtaining high usage values.

Description

technical field [0001] The invention relates to the field of computer PCB main board design, in particular to a PCB routing design method for reducing differential crosstalk. Background technique [0002] Due to the parasitic inductance and capacitance effect on the signal propagation path when laying out the PCB main board, when the signal propagates on a PCB Trace path, it will inevitably propagate to other adjacent ones through the coupled parasitic inductance and capacitance. Trace, and generate voltage noise on the near end and far end of the Trace. Therefore, the influence of crosstalk is introduced, and the improvement of signal speed and the reduction of the coupling space of the differential path will inevitably aggravate the substantial increase of crosstalk voltage, thereby affecting the design quality of the product. [0003] In traditional differential pair wiring, because no consideration is given to how to better reduce noise, the order of the differential li...

AI Technical Summary

Problems solved by technology

Therefore, the influence of crosstalk is introduced, and the improvement of signal speed and the reduction of the coupling space of differential paths will inevitably aggravate the substantial increase of crosstalk voltage, which will affect the design quality of products

[0003] In the traditional differential pair wiring, because no consideration is given to how the wiring can reduce noise, the order of the differential lines that are terminated or drawn from the differential pads of the chip is very random.

That is to say: it is common to encounter a Step pulse excitation on the differential attack line, and it is found through simulation that the noise at the far end is a bit large; this differential wiring method will generate a large noise voltage amplitude at the far end of the signal (that is, the signal receiving end)

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