cascaded semiconductor devices

Abstract

The present invention proposes a cascode transistor circuit with a depletion mode transistor and a switching device. A gate bias circuit is connected between the gate of the depletion mode transistor and the low power line. The gate bias circuit is adapted to compensate the forward voltage of the diode function of the switching device. The depletion mode transistor and gate biasing circuit are formed as part of the integrated circuit.

Description

technical field [0001] The present invention relates to a cascaded semiconductor device. The invention relates in particular to depletion mode transistors in cascode circuits with switching means. Background technique [0002] The invention particularly relates to depletion mode transistors, such as gallium nitride (GaN) transistors (eg, GaN high electron mobility transistors (HEMTs)) or silicon carbide (SiC) field effect transistors. Basic GaN power semiconductors are depletion mode (normally on) devices. However, this has the disadvantage of actively shutting down the base GaN power semiconductor before power is applied, otherwise the device would short the power supply. Also, depending on the environment, when using switching inductive loads, for example in applications where large negative currents (i.e. currents from source to drain rather than drain to source) may occur, larger current will flow into the gate. Since this may easily damage the gate structure, this m...

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Problems solved by technology

However, this has the disadvantage of actively shutting down the base GaN power semiconductor before power is applied, otherwise the device would short the power supply

[0014] Therefore, it can be seen that the gate current density easily exceeds 0.4mA / μm 2 The electron migration limit of

therefore, figure 1 Conventional GaN switches of the cascode circuit shown cannot operate reliably in reverse conduction mode

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