EPA (Ethernet for Plant Automation) communication IP (Intellectual Property) core and system on chip (SOC) based on AMBA (Advanced Microcontroller Bus Architecture) bus structure

A bus structure, system-on-chip technology, applied in bus network, general-purpose stored program computer, data exchange through path configuration, etc., can solve the problems of lack of reliability and stability, limited market prospects, expensive, etc., and achieve high integration. , the effect of broad security

Inactive Publication Date: 2014-11-05
浙江杰芯科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

From a market perspective, the cost of FPGA chips is high, and it is very expensive to build a large-scale EPA communication system, so the market prospect will be limited due to cost
From the perspective of technology and application, the ARM+FPGA platform has the risk of technology leakage, and its integration, reliability and stability are not as high as integrated circuits.

Method used

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  • EPA (Ethernet for Plant Automation) communication IP (Intellectual Property) core and system on chip (SOC) based on AMBA (Advanced Microcontroller Bus Architecture) bus structure
  • EPA (Ethernet for Plant Automation) communication IP (Intellectual Property) core and system on chip (SOC) based on AMBA (Advanced Microcontroller Bus Architecture) bus structure
  • EPA (Ethernet for Plant Automation) communication IP (Intellectual Property) core and system on chip (SOC) based on AMBA (Advanced Microcontroller Bus Architecture) bus structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0057] Such as figure 1 As shown, an EPA communication IP core based on the AMBA bus structure is used to connect to the AHB bus 2 of the system-on-chip to realize EPA communication. The IP core 1 includes:

[0058] The EPA module 11 is used to schedule and manage the sending and receiving of EPA communication messages;

[0059] The AHB interface module 12 is used to realize the communication connection between the IP core 1 and the AHB bus 2;

[0060] The DMAC module 13 is used to realize that the IP core 1 directly reads and writes the memory unit of the system on chip;

[0061] The data communication interface module 14 is used to build an EPA communication network to realize data interaction and communication between the IP core and an external host computer and other EPA devices; the data communication interface module 14 can be used to expand the communication network into star, line and different network topologies such as rings; and,

[0062] The register module 15...

Embodiment 2

[0078] Such as Figure 4 As shown, a kind of EPA communication system-on-chip based on AMBA bus structure comprises an AHB bus 2, and the AHB bus 2 is respectively mounted with:

[0079] The IP core 1 provided in Embodiment 1 is used to connect with an external host computer and periodically send and receive EPA communication messages. In this embodiment, two redundantly configured EPA modules 11 are used in the IP core 1 .

[0080] The memory unit 4 is used for storing configuration information of the IP core 1 and EPA communication message data. In this embodiment, the memory unit 4 includes a SRAM memory and a FLASH memory connected to the AHB bus 2 respectively; wherein, the FLASH memory is used to store configuration information, and the SRAM memory is used to store EPA communication message data.

[0081] The input and output unit 5 is used for connecting external devices. In this embodiment, the input and output unit 5 includes a GPIO interface, but is not limited th...

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Abstract

The invention discloses an EPA (Ethernet for Plant Automation) communication IP (Intellectual Property) core and a system on chip (SOC) based on an AMBA (Advanced Microcontroller Bus Architecture) bus structure. An EPA protocol stack is encapsulated into an IP hard core, and the IP core comprises an EPA module, an AHB (Advanced High-performance Bus) interface module, a DMAC (Direct Memory Access Controller) module, a data communication interface module and a register module. The EPA protocol stack is hooked on an AMBA bus, and constructs the SOC together with units such as a CPU (Central Processing Unit), an SRAM (Static Random Access Memory) and a FLASH. The EPA communication IP core and the system on chip have the beneficial effects that the technical advantages of an ARM (Advanced RISC Machine)+FPGA (Field Programmable Gate Array) platform are realized, and the defects of high cost, easiness in cracking a core technology and the like in the platform are successfully overcome; based on the implemented efficient interface-open SOC, a communication system based on EPA is more stable and reliable; and by adopting the IP core provided by the invention, an EPA communication function is realized, and a redundant function and an accurate clock synchronizing function are supported.

Description

technical field [0001] The invention belongs to the technical field of industrial automation communication, and in particular relates to an EPA communication IP core and an on-chip system based on an AMBA bus structure. Background technique [0002] The EPA communication system is a communication system composed of EPA protocol stack as the core, microprocessor unit, MAC unit and storage unit. At present, the EPA communication system is mainly based on microprocessor platforms such as ARM, FPGA or ARM+FPGA. The EPA protocol stack is implemented on the microprocessor, and the peripheral modules are composed of network card chips, physical layer chips and memory modules. The ARM-based EPA communication system implements the EPA protocol stack by software, which has high-speed and convenient data processing and computing capabilities, but is relatively weak in data transmission efficiency, logic processing capabilities, and execution speed. The EPA communication system based o...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L12/40G06F13/28G06F15/173G06F15/78
Inventor 童庆朱冬冬潘再生施一明谢灿华
Owner 浙江杰芯科技有限公司
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