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High-speed low-power-consumption reference voltage output buffer applied to assembly line analog-digital converter

A reference voltage output, analog-to-digital converter technology, applied in the direction of analog-to-digital converters, etc., can solve problems such as power consumption, and achieve the effects of power saving, power saving, and chip area saving

Active Publication Date: 2015-01-07
SOUTHEAST UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The traditional way of reference voltage buffer is to use two operational amplifiers to provide positive reference level and negative reference level respectively, which will consume a lot of power consumption in the case of high requirements on operational amplifiers

Method used

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  • High-speed low-power-consumption reference voltage output buffer applied to assembly line analog-digital converter
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  • High-speed low-power-consumption reference voltage output buffer applied to assembly line analog-digital converter

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Embodiment Construction

[0019] The present invention will be further described below in conjunction with the accompanying drawings.

[0020] Such as figure 1 Shown is a block diagram of a pipelined analog-to-digital converter. The core of the pipelined analog-to-digital converter is several stages of sub-ADCs, which are output to the digital correction module to output n-bit digital signals after digital correction. Each stage of the sub-ADC contains Capacitive switch circuit, so a clock generation circuit is needed to generate the clock signal of the control signal, and the reference level module is used to provide the reference level of the ADC; due to the fully differential structure, the reference level is a complementary signal based on the common mode level , that is, the positive reference level Vrefp and the negative reference level Vrefn.

[0021] Such as figure 2 Shown is the topological structure diagram of the high-speed low-power reference voltage output buffer applied to the pipeline...

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Abstract

The invention discloses a high-speed low-power-consumption reference voltage output buffer applied to an assembly line analog-digital converter. The high-speed low-power-consumption reference voltage output buffer applied to the assembly line analog-digital converter comprises a buffer feedback operational amplifier, a common mode feedback circuit, an output buffer and a resistance voltage division circuit. The resistance voltage division circuit comprises a voltage division feedback operational amplifier, a series connection voltage division resistor and a feedback tail current tube. The output buffer comprises a buffer and a mirror image circuit. The buffer feedback operational amplifier has a complementary input structure, the buffer feedback operational amplifier and the common mode feedback circuit are combined to form a fully differential operational amplifier, and the fully differential operational amplifier provides a feedback loop for a positive / negative reference level branch circuit and combines tail current of the two branch circuits. Based on an existing reference voltage output buffer, the high-speed low-power-consumption reference voltage output buffer applied to the assembly line analog-digital converter improves the buffer feedback operational amplifier, simultaneously inputs two reference levels supplied by the voltage division circuit and two feedback levels through the complementary type input structure, uses the improved fully differential operational amplifier to replace the two double-input single-output operational amplifiers, is provided with only one buffer, saves power consumption and reduces the chip area.

Description

technical field [0001] The invention relates to a high-speed and low-power reference voltage output buffer applied to a pipeline analog-to-digital converter, which belongs to the voltage output buffer technology. Background technique [0002] In a high-speed and high-resolution pipelined analog-to-digital converter (Pipelined ADC, pipelined ADC), the performance of the reference level module will directly limit its speed and accuracy. Each stage of the pipeline ADC is composed of a switched capacitor circuit, so the reference level module needs to drive a load that changes with time, so the reference needs to provide a load capacitance that is sufficiently independent of the load, which is difficult to achieve. Moreover, the switched capacitor circuit will introduce relatively large noise to the reference level module, which further improves the performance requirements of the reference level module, especially in the application of high-speed pipeline ADC. [0003] The sou...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03M1/12
Inventor 吴建辉林志伦李红汤旭婷薛金炜黄成
Owner SOUTHEAST UNIV