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Array substrate and manufacturing method thereof

An array substrate and dry etching technology, which is applied in the field of array substrate and its preparation, can solve problems such as device performance degradation, semiconductor devices cannot be used normally, and integrity damage of the gate oxide layer 102

Active Publication Date: 2015-07-22
FOUNDER MICROELECTRONICS INT
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Problems solved by technology

[0014] In this step, the thickness of the pad oxide layer 104 is grown on the upper surface and the side surface of the polysilicon layer 103 and the surface of the single crystal silicon layer 101 to be equal to the thickness of the gate oxide layer 102. The main purpose of growing the pad oxide layer 104 is to repair the damaged The damaged gate oxide layer 102, but the integrity of the gate oxide layer 102 has been damaged, so that the semiconductor device cannot be used normally, such as Figure 1c shown
[0015] It can be seen that there is an urgent need for a method for preparing an array substrate, which can not only effectively eliminate the damage on the surface of the single crystal silicon layer, but also enable the growth of a thickness of A pad oxide layer that meets the requirements, and can avoid the problem of device performance degradation caused by lateral undercutting, thereby improving the reliability of the array substrate

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  • Array substrate and manufacturing method thereof
  • Array substrate and manufacturing method thereof

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Embodiment Construction

[0049] Dry etching is a technique that uses plasma to etch thin films. When the gas exists in the form of plasma, it has two characteristics: on the one hand, the chemical activity of these gases in the plasma is much stronger than that under normal conditions. React with the material to achieve the purpose of etching and removal; on the other hand, the electric field can also be used to guide and accelerate the plasma, so that it has a certain energy. When it bombards the surface of the etched object, it will be etched The atoms of the object material are knocked out, so as to achieve the purpose of etching by physical energy transfer.

[0050] In the prior art, in the preparation process of the array substrate, after the gate oxide layer and the polysilicon layer are prepared layer by layer on the single crystal silicon layer, a patterned polysilicon layer is formed by dry etching. At this time, the gate not covered by the polysilicon layer There is still part of the oxide ...

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Abstract

The embodiment of the invention discloses an array substrate and a manufacturing method thereof. The method comprises steps: a gate oxide layer and a polycrystalline silicon layer are manufactured layer by layer on a monocrystalline silicon layer; dry etching is adopted to form a graphical polycrystalline silicon layer; dry etching is adopted to remove the gate oxide layer not covered by the polycrystalline silicon layer; an oxide layer grows on the surface of the polycrystalline silicon layer and the monocrystalline silicon layer, wherein the thickness of the oxide layer is smaller than the thickens of the gate oxide layer not covered by the polycrystalline silicon layer after dry etching; wet etching is adopted to remove the oxide layer; and a pad oxide layer finally grows on the surface of the polycrystalline silicon layer and the monocrystalline silicon layer. As the oxide layer grows on the surface of the polycrystalline silicon layer and the monocrystalline silicon layer and wet drying is then adopted to remove the oxide layer, damages on the surface of the monocrystalline silicon layer can be effectively eliminated, and thus, during a subsequent pad oxide layer growing process, the pad oxide layer whose thickness meets requirements can grow on the surface of the monocrystalline silicon layer, and the problem of falling device performance caused by horizontal undercutting can be solved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor chip manufacturing technology, in particular to an array substrate and a preparation method thereof. Background technique [0002] In the manufacturing process of the array substrate in the semiconductor, the surface of the single crystal silicon layer is sometimes damaged by certain processes, such processes include dry etching or ion implantation. The damage mechanism is: during the etching or implantation process, high-energy ions bombard the surface of the single crystal silicon layer for a long time, so that the neatly arranged silicon atoms on the surface of the single crystal silicon layer become chaotic, so the damage of the single crystal silicon layer The surface changes from single crystal to amorphous. [0003] In the prior art, in the preparation process of the array substrate, after the gate oxide layer and the polysilicon layer are prepared layer by layer on the singl...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/02H01L21/77
Inventor 闻正锋马万里赵文魁
Owner FOUNDER MICROELECTRONICS INT