Method for bonding preparation of Ge-on-insulator (GOI) through Ge film

Abstract

The invention discloses a method for bonding preparation of Ge-on-insulator (GOI) through a Ge film, and relates to GOI. The method comprises the following steps: performing ion implantation on a Ge sheet to form a defect plane; binding PDMS with the processed Ge sheet by use of light cured glue; applying a cutting force parallel to a peeling plane on a processed flexible support substrate, and tearing a surface Ge film from a body Ge substrate along the defect plane to obtain a flexible Ge film; then obtaining the Ge film through polishing, then cleaning the Ge film and an SiO2 / Si wafer, performing bumping with the surface of the wafer by use of plasma, and at the same time, performing activation processing on the surface; attaching the processed Ge film to the SiO2 / Si wafer; fully discharging air of an interface by use of a rolling method; and performing pre-bonding on a sample after processing, afterwards, peeling the flexible susbtrate from a GOI structure, and performing annealing so as to enhance bonding surface energy and improve the bonding intensity.

Description

Technical field

[0001] The invention relates to germanium on an insulating layer, and in particular to a flexible Ge film obtained by mechanically stripping an ion-implanted Ge wafer, and rolling the flexible Ge film to combine it with SiO 2 / Si surface bonding, Ge film bonding combined with low temperature bonding technology to prepare germanium on the insulating layer. Background technique

[0002] GOI materials have many unique physical properties, which combine the high carrier mobility of Ge materials and the advantages of SOI materials such as low power consumption, radiation resistance, and high temperature resistance [1-3], and they are more mature in terms of manufacturing technology. The silicon process is compatible and has become a very attractive new Si-based material.

[0003] The part or complete depletion device structure of VLSI requires 200mm and 300mm wafer size. For MEMS, MOEMS, and Smart Power, the wafer size is usually 4 inches to 6 inches [4], especially when...

Examples

Embodiment Construction

[0028] The following examples will further illustrate the present invention.

[0029] 1. First, use SRIM 2008 software (Stopping and Range of Ions in Matter) to simulate the projection range of hydrogen ions at different energies, and then determine the implantation energy of hydrogen ions according to the required Ge thickness of the GOI top layer. Before implantation, use PECVD to deposit 90nm SiO on its surface 2 , As a protective layer for hydrogen ion implantation. Then, hydrogen ion implantation is carried out at room temperature with an LC-4 high-energy ion implanter, and the implantation dose is 5×10 16 cm -2 , The injection energy is 250keV. The vacuum level of the target chamber during injection is 10 -6 Torr, the ion beam deviates 7° from the sample normal to avoid channeling effect; at the same time, in order to prevent the self-heating effect caused by excessive beam current, the ion beam current density is controlled at 0.8μA / cm 2 about. After injection, use dilute...

Technical field

[0001] The invention relates to germanium on an insulating layer, and in particular to a flexible Ge film obtained by mechanically stripping an ion-implanted Ge wafer, and rolling the flexible Ge film to combine it with SiO 2 / Si surface bonding, Ge film bonding combined with low temperature bonding technology to prepare germanium on the insulating layer. Background technique

[0002] GOI materials have many unique physical properties, which combine the high carrier mobility of Ge materials and the advantages of SOI materials such as low power consumption, radiation resistance, and high temperature resistance [1-3], and they are more mature in terms of manufacturing technology. The silicon process is compatible and has become a very attractive new Si-based material.

[0003] The part or complete depletion device structure of VLSI requires 200mm and 300mm wafer size. For MEMS, MOEMS, and Smart Power, the wafer size is usually 4 inches to 6 inches [4], especially when...

Examples

Embodiment Construction

[0028] The following examples will further illustrate the present invention.

[0029] 1. First, use SRIM 2008 software (Stopping and Range of Ions in Matter) to simulate the projection range of hydrogen ions at different energies, and then determine the implantation energy of hydrogen ions according to the required Ge thickness of the GOI top layer. Before implantation, use PECVD to deposit 90nm SiO on its surface 2 , As a protective layer for hydrogen ion implantation. Then, hydrogen ion implantation is carried out at room temperature with an LC-4 high-energy ion implanter, and the implantation dose is 5×10 16 cm -2 , The injection energy is 250keV. The vacuum level of the target chamber during injection is 10 -6 Torr, the ion beam deviates 7° from the sample normal to avoid channeling effect; at the same time, in order to prevent the self-heating effect caused by excessive beam current, the ion beam current density is controlled at 0.8μA / cm 2 about. After injection, use dilute...