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Prepreg, metal-clad laminate and printed circuit board

A prepreg, metal foil technology, applied in metal layered products, printed circuits, printed circuits, etc., can solve the problems of large CTE, unfavorable suppression of package warpage, and reduction of dielectric constant.

Active Publication Date: 2015-09-16
PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Furthermore, it is known that the PPE described in Patent Document 4 generally has a large CTE, which is not conducive to suppressing the warpage of the package.
In addition, a material in which a radical polymerizable thermosetting resin is mixed with an epoxy resin as described in Patent Document 6 has an effect of lowering the dielectric constant because the dielectric constant of the radical polymerizable thermosetting resin is lower than that of an epoxy resin, but There is a problem from the viewpoint of flame retardancy

Method used

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  • Prepreg, metal-clad laminate and printed circuit board
  • Prepreg, metal-clad laminate and printed circuit board
  • Prepreg, metal-clad laminate and printed circuit board

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0104] (Prepreg)

[0105] First, mix the polyarylether copolymer (PAE) and toluene, and heat the mixed solution to 80° C., so that the polyarylether copolymer is dissolved in toluene to obtain a 50 mass % toluene solution of the polyarylether copolymer (ie: A solution in which the polyarylether copolymer concentration is 50% by mass and the solvent is toluene). Thereafter, an epoxy resin and a high molecular weight body were added to the toluene solution of the polyarylether copolymer so as to obtain the compounding ratio described in Table 1, and stirred for 30 minutes to completely dissolve it. Next, a curing accelerator and an inorganic filler were further added and dispersed with a ball mill to obtain a varnish-like resin composition (resin varnish).

[0106] Using the above-mentioned varnishes, two prepregs were fabricated for the later evaluation for convenience of illustration.

[0107] For the prepreg 1, glass cloth of #2116 type and WEA116E manufactured by Nitto Bos...

Embodiment 2～11 and comparative example 1～3

[0117] A prepreg and a copper-clad laminate were produced in the same manner as in Example 1 except that the formulation of the resin composition was changed to that shown in Table 1.

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Abstract

Provided is a prepreg that is formed by impregnating a fabric base material with a resin composition, then heating and drying. The resin composition includes (A) a polymer which has a specific structure, has no unsaturated bond between carbon atoms, has an epoxy number of from 0.2 to 0.8 eq / kg, and has a weight-average molecular weight of from 200,000 to 1,000,000; (B) a polyarylene-ether copolymer (PAE); and (C) an epoxy resin having two or more epoxy groups on a molecule. The component (B) is compatible with the component (A), and the component (C) is an epoxy resin that is incompatible with the component (A).

Description

technical field [0001] The present invention relates to a prepreg, a metal-clad laminate formed using the prepreg, and a printed wiring board formed using the metal-clad laminate. Background technique [0002] With the reduction in size and thickness of electronic devices, surface mount packages are often used as electronic components included in electronic devices. Specific examples of such a package (PKG) include packages in which a semiconductor chip is mounted on a substrate, such as a BOC (Chip On Board). This type of package is a structure in which a semiconductor chip is bonded to a substrate. Therefore, due to the difference in coefficient of thermal expansion (Coefficient of Thermal Expansion: CTE) between the semiconductor chip and the substrate, deformation such as warping of the package due to temperature changes may occur. In addition, if such a package has a large warpage, the force of peeling the semiconductor chip and the substrate will increase, resulting ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B32B27/04B32B27/28B32B27/38B32B25/02B32B25/04B32B15/06B32B15/092C08L33/04C08L71/12C08L63/00C08K9/06C08K3/36H05K1/03
CPCC08J2463/00C08J2315/00C08J2371/12C08J5/24C08J2471/12H05K1/056H05K2201/029C08L71/12C08J2333/00C08J2433/00H05K1/0353H05K1/0366H05K1/0373H05K3/022H05K2201/0209Y10T428/249921Y10T442/2951C08J5/244C08J5/249C08L33/06C08L33/20C08L63/00
Inventor 梅原大明井上博晴
Owner PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD