Method of preparing silicon switch plate efficiently
An adapter board, silicon-based technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., to achieve good bonding force, simplified process steps, and good electrical conductivity
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Embodiment 1
[0035] In this embodiment, sputtering technology is used to deposit Ti / Cu and other barrier layers and seed layers on the oxide layer, hot pressing technology is used to bond dry film photoresist and silicon wafer, and electroplating technology is used to bond TSVs and Pads. The area is filled.
[0036] 1) Spin-coat a positive resist of 15 μm on the silicon wafer, bake the glue in an oven, and perform photolithography and development on the silicon wafer after the glue has been baked;
[0037] 2) Etching TSVs (with a diameter of 25 μm and an aspect ratio of 6) on the silicon wafer treated in step 1) by using deep reactive ion etching technology;
[0038] 3) High temperature oxidation (800°C-1200°C) is used to oxidize the surface of the silicon wafer treated in step 2), and the oxidized thickness is 0.2 μm;
[0039] 4) sputtering a seed layer of Ti / Cu on the silicon wafer surface treated in step 3);
[0040] 5) Bond dry film photoresist on the surface of the silicon wafer, an...
Embodiment 2
[0044] In this embodiment, the previous steps are the same as in Embodiment 1, except that the negative glue is selected as the coating here.
[0045] 1) Spin-coat the silicon wafer with a 10 μm negative glue, bake the glue with a hot plate, and perform photolithography and development on the silicon wafer after the glue has been baked;
[0046] 2) Etching TSVs (with a diameter of 25 μm and an aspect ratio of 6) on the silicon wafer treated in step 1) by using deep reactive ion etching technology;
[0047] 3) using chemical deposition technology to oxidize the surface of the silicon wafer treated in step 2), and the oxidized thickness is above 0.21 μm;
[0048] 4) sputtering a seed layer of Ti / Cu on the silicon wafer surface treated in step 3);
[0049] 5) Bond dry film photoresist on the surface of the silicon wafer, and then perform photolithography and development;
[0050] 6) Fill TSV with electroplating technology;
[0051] 7) Remove the silicon-based adapter plate pre...
Embodiment 3
[0053] In this embodiment, the previous steps are the same as those in Embodiment 2, except that electroplating is performed here, TSVs with a high aspect ratio (aspect ratio of 10) are filled, and a silicon oxide insulating film is deposited by chemical deposition technology.
[0054] 1) Spin-coat the silicon wafer with 20 μm negative glue, bake the glue in a programmable oven, and perform photolithography and development on the silicon wafer after the glue is baked;
[0055]2) Etching TSVs (with a diameter of 15 μm and an aspect ratio of 10) on the silicon wafer treated in step 1) by using deep reactive ion etching technology;
[0056] 3) using chemical deposition technology to oxidize the surface of the silicon wafer treated in step 2), and the oxidized thickness is 0.22 μm;
[0057] 4) sputtering a seed layer of Ti / Cu on the silicon wafer surface treated in step 3);
[0058] 5) Paste a dry film photoresist on the surface of the silicon wafer, and then perform photolithogr...
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Abstract
Description
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