A new type of integrated circuit chip on-chip power supply noise self-regulating system and its regulating method

An integrated circuit and power supply noise technology, which is applied in the field of on-chip power supply noise self-regulation systems, can solve problems such as large power consumption, difficulty in generating frequency on chips, and no peak power supply noise involved, so as to achieve small impact, small functional impact, and avoid power consumption abnormal effect

Active Publication Date: 2017-11-21
BEIHANG UNIV
View PDF1 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0011] After searching the existing technical documents, it was found that Z.Abuhamdeh had published "Separating temperature effects from ring-oscillator raddings to measure true ir-drop on a chip" in IEEEInternational Test Conference (International Test Conference) in 2007. Oscillator influence to detect on-chip IR-Drop noise)” proposes a method to detect power supply noise by detecting the frequency change of the ring oscillator, but this method can only give the average power supply noise over a period of time, and does not involve the power supply noise peak
In 2005, T.Okumoto et al. published "A built-in technique for probing power-supply noise distribution within large-scale digital integrated circuits" in IEEE Journal of Solid-State Circuits (Journal of Solid-State Circuits). The technology used to detect the power supply noise distribution) ", proposed a method of using AD sampling to obtain the instantaneous noise of the power supply, usually the sampling frequency should be several times the system clock frequency, which will cause a large power consumption, while it is difficult to generate such a high frequency on chip

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A new type of integrated circuit chip on-chip power supply noise self-regulating system and its regulating method
  • A new type of integrated circuit chip on-chip power supply noise self-regulating system and its regulating method
  • A new type of integrated circuit chip on-chip power supply noise self-regulating system and its regulating method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0182] The test carried out by applying the power supply noise peak measurement module designed by the present invention:

[0183] HSPICE software (version 2008 and above) is used for testing. This test uses Nangate 45nm open source library to add noise to the power supply network. The reference power supply voltage is 1.20V, the noise peak value is 1.17V, and the noise influence time is 1ns. First generate a digital signature lookup table. After that, the power supply plus noise is tested, and the simulation results are as follows: Figure 3D and Figure 3E ( Figure 3E yes Figure 3D As shown in the color display), when the noise comes, the measurement module responds quickly. As the voltage of the power supply network drops, the fourth inverter, the fifth inverter and the sixth inverter successively flip over, making the fourth The output of the first-level trigger units of the group flip-flops, the fifth group of flip-flops and the sixth group of flip-flops changes fro...

Embodiment 2

[0190] The test carried out by applying the power supply noise peak adjustment module designed by the present invention:

[0191] Use HSPICE software (version 2008 and above) to test, the power supply voltage without noise in this test is 1.20V, and the power supply voltage drops to 1.08V due to noise.

[0192] When there is no noise in the power supply, the output of the delay-sensitive path tested is as follows Figure 4A Shown by the black line segment; when the power supply contains noise, apply the same input to the input end of the path, if the adjustment measures of the present invention are not taken, its output is as follows Figure 4B As shown, it is obvious that an error has occurred in its output; the path is adjusted using the present invention, and its output is as follows Figure 4C shown.

[0193] through Figure 4C and Figure 4A In contrast, the high and low level logics of the two are the same at the same sampling time, and the reason why the output wave...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses an on-chip power supply noise autonomous adjustment system and adjustment method of a new integrated circuit chip. The system is composed of an adjustment trigger, a data selector and an adaptive control module. On the path, the adaptive control module is connected with the data selector. The system can adjust the delay sensitive path according to the real-time power supply noise, so as to avoid the path output error caused by the power supply noise. The on-chip power supply noise autonomous adjustment system designed by the present invention has less influence on the chip and is convenient to adjust, and can be used for real-time adjustment on the chip to weaken the influence of power supply noise on the chip and ensure the normal operation of the chip.

Description

technical field [0001] The invention relates to a system for adjusting power supply noise, more precisely, an on-chip power supply noise self-regulating system and method for a novel integrated circuit chip. Background technique [0002] An integrated circuit (integrated circuit) is a tiny electronic device or component. Using a certain process, the transistors required in a circuit (the transistors are the main devices in the gate circuit), resistors, capacitors, inductors and other components and wiring are interconnected together to make a small or several small semiconductor wafers Or on a dielectric substrate, and then packaged in a package to become a microstructure with the required circuit functions; all the components have been structurally integrated, making electronic components towards miniaturization, low power consumption, intelligence and high A big step forward in terms of reliability. According to their different functions and structures, integrated circui...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50
Inventor 苏东林张东嵘王晓晓
Owner BEIHANG UNIV
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products