Transistor forming method

Abstract

The invention provides a transistor forming method. The transistor forming method is characterized in that a substrate can be provided; dummy grid layers can be formed on the surface of the substrate, and the surfaces of the side walls of the dummy grid layers are provided with side walls; first dielectric layers are formed on the substrate and the surfaces of the side walls, and the surfaces of the first dielectric layers are lower than the surfaces of the dummy grid layers; the side walls higher than the surfaces of the first dielectric layers can be removed, and the parts of the surfaces of the side walls of the dummy grid layers can be exposed, and first openings can be formed in the first dielectric layers between adjacent dummy grid layers and the surfaces of the side walls; second dielectric layers are formed in the first openings, and the surfaces of the second dielectric layers are aligned with the surfaces of the dummy grid layers, and the densities of the materials of the second dielectric layers are higher than the densities of the materials of the first dielectric layers; the dummy grid layers can be removed, and second openings can be formed in the second dielectric layers and the first dielectric layers; the etching of the side walls of the second dielectric layers of the second openings can be carried out, and then the sizes of the top parts of the second openings can be enlarged; grid layers can be formed in the second openings after the etching of the side walls of the second dielectric layers of the second openings. The performance of the formed transistors is stable, and the reliability can be improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a transistor. Background technique [0002] With the rapid development of integrated circuit manufacturing technology, the size of semiconductor devices in integrated circuits, especially MOS (Metal Oxide Semiconductor, metal-oxide-semiconductor) devices, is continuously reduced to meet the miniaturization and integration of integrated circuit development. Requirements, and transistor devices are one of the important components of MOS devices. [0003] For transistor devices, as the size of the transistor continues to shrink, the gate dielectric layer formed of silicon oxide or silicon oxynitride material in the prior art cannot meet the performance requirements of the transistor. In particular, transistors formed with silicon oxide or silicon oxynitride as the gate dielectric layer are prone to a series of problems such as leakage curren...

AI Technical Summary

Problems solved by technology

[0005] However, with the continuous reduction of semiconductor process nodes, the size of the formed high-k metal gate transistors is continuously reduced and the device density is continuously increased, which makes it difficult to control the process of manufacturing high-k metal gate transistors, and the performance of the formed high-k metal gate transistors unstable

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