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Method for preparing low-cost substrates

A technology of conductive parts and regions, applied in the field of packaging of microelectronic devices, can solve problems such as chip assembly

Active Publication Date: 2019-06-25
INVENSAS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Complex portable devices require packing many chips into a small space

Method used

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  • Method for preparing low-cost substrates
  • Method for preparing low-cost substrates
  • Method for preparing low-cost substrates

Examples

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Embodiment Construction

[0055] Components described herein, such as interposers, substrates, circuit panels, microelectronic elements, etc., may have one or both of insulating and dielectric structures at their outer surfaces in some arrangements. Thus, as used in this disclosure, a statement that a conductive element is "at" a surface of a component's dielectric structure means that when the component is not assembled with any other A theoretical point contact moving in the direction of the part surface from outside the part towards the part surface. Thus, a terminal or other conductive element at a surface of a component may protrude from such surface; may be flush with such surface; or may be recessed relative to such surface in the form of a hole or recess in the component.

[0056] Now see attached picture, as figure 1 As shown, the conductive layer 10 can be attached to the support 5 together, or the conductive layer 10 can be attached to the support 5 . In one example, support 5 may comprise...

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Abstract

A mask is formed above the first conduction part of the conductive layer to expose the second conductive part of the conductive layer.The electrolytic process is performed to remove the conductive material from the first and second regions of the second and second regions of the second conductive part.Compared with the electric field applied by the electrolytic process, the second area is aligned with the mask.The first region of the second area is separated from the first area of the second conductive part from the first conduction part.Compared with the concentration of the second region, the electrolytic process is removed from a relatively higher ratio in the second area compared to the first area.

Description

Background technique [0001] The present invention relates to the packaging of microelectronic devices, and more particularly to the packaging of semiconductor devices. [0002] Microelectronic devices typically include a thin sheet of semiconductor material, such as silicon or gallium arsenide, which is often referred to as a die or semiconductor chip. Semiconductor chips are typically provided as individual pre-packaged units. In some cell designs, the semiconductor chip is mounted to a substrate or chip carrier, which in turn is mounted to a circuit panel, such as a printed circuit board. [0003] Active circuitry is fabricated in a first side (eg front side) of the semiconductor chip. To facilitate electrical connection to active circuitry, the chip is provided with bond pads on the same side. The bond pads are typically arranged in a regular array, either around the edges of the die or, for many memory devices, in the center of the die. Bond pads are typically made of ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): C25F3/14H01L23/498H01L21/48
CPCC25F3/14H01L23/49827H01L21/486H01L2224/16225H01L2924/15311H01L23/49816H01L23/49822H05K3/07H05K2201/10378H01L21/6835H01L2221/68345H01L2221/68381C25F3/12H05K1/0212H05K1/115H01L21/4857H01L23/367H01L23/3733H01L23/49838H01L23/49866H01L24/17H01L25/0655H01L2924/01022H01L2924/01028H01L2924/01042H01L2924/01047H01L2924/0105H01L2924/01074H01L2924/01079H01L2924/15701H01L2924/15724H01L2924/15738H01L2924/15747H01L2924/15763
Inventor C·E·尤佐A·R·西塔拉姆
Owner INVENSAS CORP
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