Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

TFT array substrate manufacture method

A manufacturing method and array substrate technology, applied in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve the problems of ITO residue, increase in TFT size, and unfavorable improvement of pixel density, so as to increase pixel density and reduce effect of size

Active Publication Date: 2016-06-22
WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
View PDF4 Cites 14 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] However, the above process requires the use of two photomasks, and since the flat layer 700 is thicker, the subsequent formation of the common electrode layer 810 is likely to leave conductive material ITO in the first via hole 710, that is, in the pixel (Pixel) area, resulting in a short circuit. but if the angle of the slope (Taper) of the first via hole 710 is set to be smaller, that is, by forming a relatively gentle first via hole 710 to solve the ITO residual problem, then the first via hole must be correspondingly increased. The area of ​​the hole 710 increases the size of the TFT to a certain extent, which is not conducive to improving the pixel density (PixelsPerInch, PPI)

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • TFT array substrate manufacture method
  • TFT array substrate manufacture method
  • TFT array substrate manufacture method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0051] In order to further illustrate the technical means adopted by the present invention and its effects, the following describes in detail in conjunction with preferred embodiments of the present invention and accompanying drawings.

[0052] see Figure 3-14 , the following with FFS (FringeFieldSwitching, fringe field switching technology) type CMOS (ComplementaryMetalOxideSemiconductor, Complementary Metal Oxide Semiconductor) TFT array substrate making as a preferred embodiment of the present invention, the preparation method of the TFT array substrate provided by the present invention, specifically includes the following step:

[0053] Step 1, such as Figure 4 As shown, a base substrate 10 is provided, a first metal layer is deposited on the base substrate 10, and the first metal layer is patterned to obtain a light-shielding layer 20; The base substrate 10 forms a buffer layer 23 .

[0054] Specifically, the base substrate 10 is a transparent substrate, preferably a...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a TFT (Thin Film Transistor) array substrate manufacture method which comprises the following steps: coating and forming a flat layer on source electrodes and drain electrodes; instead of processing via holes, depositing and patterning a common electrode layer and a passivated protection layer; forming via holes in the passivated protection layer so as to expose the flat layer, and then ashing the flat layer so as to expose the drain electrodes. Compared with a conventional method by which the common electrode layer is deposited and patterned after the via holes are formed in the flat layer, the TFT array substrate manufacture method described in the invention is advantageous in that no electrically conductive material will be left in the via holes of the flat layer when the common electrode layer is patterned, and therefore no short circuit problem will occur in the via holes of the flat layer; the via holes are formed in the flat layer in a pixel region by a means of dry etching through ashing operation, the formed via holes are allowed to have large slope angles, and therefore the size of a TFT can be reduced to a certain extent and and pixel density can be improved.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a method for manufacturing a TFT array substrate. Background technique [0002] Thin Film Transistor (ThinFilmTransistor, TFT) is the main driving element in the current Liquid Crystal Display (Liquid Crystal Display, LCD) and active matrix driven organic electroluminescent display (ActiveMatrixOrganicLight-EmittingDiode, AMOLED), directly related to the display performance of the flat panel display . [0003] Thin film transistors have various structures, and there are also various materials for preparing thin film transistors with corresponding structures. Low Temperature Poly-silicon (LTPS) material is one of the more preferred materials. Due to the regular arrangement of atoms of low-temperature poly-silicon, the carrier migration For voltage-driven liquid crystal display devices, low-temperature polysilicon thin-film transistors can use smaller thin-film transistors to rea...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/77H01L27/12
CPCH01L27/1259H01L27/1262
Inventor 郭远
Owner WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products