SiC-based device gate dielectric layer structure and gate dielectric layer formation method

Abstract

The invention discloses a SiC-based device gate dielectric layer formation method. The formation method comprises the following steps that a SiC substrate is provided; a silicon oxide layer is formed on the SiC substrate; a metal layer is formed on the silicon oxide layer; thermal treatment is performed on the metal layer so that a metal oxide layer is formed; and a gate electrode is formed on the metal oxide layer. According to the SiC-based device gate dielectric layer formation method, the breakdown resistance and the stability of a SiC-based device can be enhanced, electron mobility can be enhanced, leakage current can be reduced and the preparation efficiency can be enhanced. The invention also provides a SiC-based device gate dielectric layer structure formed by the method.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, and in particular relates to a method for forming a gate dielectric layer of a SiC-based device and a gate dielectric layer structure of the SiC-based device. Background technique [0002] Silicon carbide (SiC) is a wide-bandgap semiconductor material with excellent performance. It not only has the characteristics of wide bandgap, high thermal conductivity, high breakdown field strength, and high saturation electron drift rate, but also has excellent physical and chemical stability. Sex, strong radiation resistance and mechanical strength. Therefore, SiC can be used to develop high-temperature, high-power, high-frequency power devices. [0003] At present, the insulating gate dielectric layer of SiC-based MOS power devices is mainly formed by high-temperature thermal oxidation of SiC surface to form SiO 2 The dielectric layer is then annealed. However, SiO formed by thermal oxidation of...

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Problems solved by technology

However, SiO formed by thermal oxidation of SiC substrates 2 The dielectric constant of the layer is lower than that of SiC, making SiO 2 The internal field strength is higher than that of the SiC substrate, often resulting in SiO 2 It is broken down earlier than SiC, which does not show the superiority of SiC material

Secondly, SiO 2 There are more interface states between the SiC substrate and the scattering of the carriers by the interface states, resulting in an order of magnitude lower carrier mobility in the channel of the MOS device than that of the SiC bulk material. In addition, due to the high temperature oxidation of the SiC surface, there is There are a lot of carbon particles remaining, SiO 2 The quality deviation of the dielectric layer, the electron mobility and reliability of SiC-based MOS devices cannot be guaranteed

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