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Inverted trapezoid top grid-structure fin field-effect transistor and fabrication method thereof

A fin field effect, inverted trapezoidal technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of large leakage current, weak gate control ability, large equivalent Fin thickness, etc. State current, small source-drain series resistance, low cost effect

Inactive Publication Date: 2017-01-04
PEKING UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Rectangular Fin is the opposite. The equivalent thickness of Fin is relatively large, the gate control ability is weaker than that of triangular Fin, and the leakage current is large. The cross-sectional area of ​​the track is also larger, so the driving current will be much higher than that of the triangle Fin

Method used

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  • Inverted trapezoid top grid-structure fin field-effect transistor and fabrication method thereof
  • Inverted trapezoid top grid-structure fin field-effect transistor and fabrication method thereof
  • Inverted trapezoid top grid-structure fin field-effect transistor and fabrication method thereof

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Embodiment Construction

[0073] The present invention will be described in detail below in conjunction with the accompanying drawings and specific examples.

[0074] According to the following steps, the N-type inverted trapezoidal top-gate structure fin field effect transistor can be realized on the SOI substrate:

[0075] 1) On the P-type (100) SOI substrate, the top silicon film will be thinned to 250nm by HNA solution, LPCVDSiO 2 100nm as mask layer 1, such as figure 1 shown;

[0076] 2) Define the mask pattern of the channel region with a length of 100nm and a width of 50nm by electron beam lithography, that is, the line width of the top of the inverted trapezoidal Fin is 50nm, using photoresist as a mask, and ICP etching mask layer 1 to form a rectangular Fin mask film, the line width of the rectangular Fin mask is 50nm, which is the line width at the top of the inverted trapezoidal Fin; figure 2 shown;

[0077] 3) LPCVD 300nm silicon nitride is used as the mask layer 2, the mask layer 1 i...

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Abstract

The invention provides an inverted trapezoid top grid-structure fin field-effect transistor and a fabrication method thereof, and belongs to the technical field of fabrication of a super-large-scale integrated circuit. With the adoption of an inverted trapezoid top grid structure, grid control capability of the fin field-effect transistor is arranged between three grids and a ring grid, so that the leakage current of the inverted trapezoid top-grid FinFET is smaller than that of traditional FinFET; and moreover, a source-drain region of the device is a single-silicon active island and has relatively small source-drain series resistance, and compared with a traditional fin field-effect transistor using a lifting source-drain structure, a relatively high on-state current can be acquired without using an epitaxial process to fabricate a lifting source-drain. The fabrication method is compatible with a traditional integrated circuit fabrication technology, the process is simple, and the cost is low.

Description

technical field [0001] The invention belongs to the technical field of VLSI manufacturing, and relates to an inverted trapezoidal top gate structure fin field effect transistor and a preparation method thereof. Background technique [0002] When semiconductor devices enter the 22nm technology generation, the three-dimensional multi-gate device (Multi-gate MOSFET, MuGFET) represented by Fin Field Effect Transistor (FinFET), with its outstanding short-channel effect suppression ability, high integration density, and traditional CMOS process compatibility and other advantages have become the mainstream of semiconductor devices. The Fin structure of an ideal FinFET should be a standard rectangle or square. However, due to the reliability hazards at sharp corners and the limitations of process conditions, the actual Fin of a FinFET will not be an ideal shape. For example, Intel adopts a triangular-like Fin with a small top and a large bottom at the 22nm technology node, and when...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/423H01L21/336H01L29/417
CPCH01L29/7853H01L29/78H01L29/41725H01L29/42316H01L29/66409
Inventor 黎明陈珙张嘉阳黄如
Owner PEKING UNIV