Methods for improving the compatibility of silicon carbide epitaxy
A compatibility and silicon carbide technology, which is applied in the manufacture of electrical components, circuits, semiconductors/solid-state devices, etc., can solve problems such as discontinuity, improve compatibility, reduce concentration and thickness calibration frequency, and reduce inter-chip deviation Effect
Active Publication Date: 2019-08-20
NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD
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At the same time, there is a strong edge effect at the substrate edge due to the discontinuity of the source depletion rate at the pedestal and substrate edge
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[0019] The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0020] The method for improving the epitaxial compatibility of silicon carbide described in the present invention is to select the graphite base with the largest size supported by the epitaxial furnace during use. When placing a small-sized substrate, put in a suitable size filler piece, and when the substrate size is the same as the base size, there is no need to add a filler piece. like figure 2 As shown in the figure, if you choose the 6-inch graphite base that comes with the system, when placing a 3-inch or 4-inch substrate, you need to add a filler piece of the corresponding size. When placing a 6-inch substrate, there is no need to add a filler piece. Adding fillers can solve the problem of different epitaxial properties of SiC substrates with different sizes, and can also reduce the edge effect in the epitaxial proce...
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Abstract
The invention discloses a method for improving the compatibility of silicon carbide epitaxies. Graphite bases with the maximum sizes supported by an epitaxial furnace are selected in use; when substrates with small sizes are placed, filling sheets with appropriate sizes are placed; and when the sizes of the substrates are equal to those of the bases, the filling sheets do not need to be added. According to the method, substrate regions extend through a mode of introducing the filling sheets which have the same doping type, crystal plane, crystal orientation and surface appearance as the substrates, so that the ratios of the bases corresponding to the substrates with different sizes to the substrate regions are close to one another, the depletion rates of sources on actual substrates continuously change and the edge effect is avoided. Meanwhile, the concentration of the sources at the same positions at the upper parts of the substrates with different sizes is similar through introduction of the filling sheets, so that the compatibility of the bases with different sizes is improved, meanwhile, simultaneous growth of the substrates with different sizes can also be achieved in the multi-chip epitaxial furnace, and the inter-chip deviation is greatly reduced.
Description
technical field [0001] The invention relates to a method for growing silicon carbide epitaxial wafers, in particular to a method for improving the compatibility of silicon carbide epitaxy. Background technique [0002] SiC is the third-generation new semiconductor material developed after Si and GaAs and other materials. At room temperature, the SiC band gap reaches 3.0eV, and the breakdown electric field strength reaches 3×10 6 V / cm, thermal conductivity up to 4.9W / cm·℃, electron saturation drift speed up to 2×10 7 cm / s. The superior material properties make SiC an ideal material for high-performance electronic devices. After more than ten years of development, the SiC epitaxial wafer size, crystal quality, uniformity and other indicators have been greatly improved. The current commercial SiC substrate size has risen to 6 inches, but most SiC device development lines are still 3. inches or 4 inches, so SiC epitaxial materials are required to cover 3-6 inches. [0003] A...
Claims
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IPC IPC(8): H01L21/04
Inventor 李赟
Owner NO 55 INST CHINA ELECTRONIC SCI & TECHNOLOGYGROUP CO LTD