Method for reducing depressed deformation of sacrificial layer in three-dimensional stacking in chemical mechanical polishing

Abstract

The invention relates to a method for reducing depressed deformation of a sacrificial layer in three-dimensional stacking in chemical mechanical polishing. The method includes the steps of firstly, growing a stop layer; secondly, etching the stop layer to form an etching trench; thirdly, depositing the sacrificial layer; fourthly, etching the sacrificial layer; fifthly, depositing a planarization layer; sixthly, conducting wafer non-graphical etching; seventhly, removing the sacrificial layer and the planarization layer; eighthly, removing the stop layer; ninthly, adjusting flatness and roughness of a wafer through chemico-mechanical polishing; tenthly, cleaning after grinding. The method has the advantages that since the photoetched sacrificial layer and planarization material filling are added, surface morphological unevenness caused by graphics with huge differences in size and density is removed and the super-thick sacrificial layer CMP cost is reduced greatly; ultra-high planarization uniformity and little depressed deformation can be achieved through non-graphical etching and three-step CMP, so that the planarization requirements on different thicknesses of silicon dioxide sacrificial layers in three-dimensional stacking are met.

Description

technical field [0001] The invention relates to a method for reducing the concave deformation of a sacrificial layer in chemical mechanical polishing (CMP) in a three-dimensional stack, and belongs to the technical field of micro-electromechanical system packaging. Background technique [0002] In the RF microsystem, multi-field devices or chips such as active chips, IPDs, and MEMS sensors are integrated through three-dimensional stacking. Among them, the MEMS sensor includes many movable structures that can realize different functions. The realization of the movable structure generally adopts the sacrificial layer process. The material of the sacrificial layer includes silicon oxide, PSG, special metal and polymer, etc.; Due to the sensitivity of other device layers to temperature, low-temperature silicon oxide is used as the sacrificial layer process. The commonly used silicon oxide sacrificial layer process is as follows: growth stop layer silicon nitride on the silicon w...

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Problems solved by technology

[0003] The traditional sacrificial layer process can achieve global planarization with small line width and uniform pattern, but when the pattern with line width 1µm-300µm exists at the same time, serious butterfly-shaped depressions and local deformation of the structure will occur, which will lead to high requirements for flatness. The high device fails completely; the reason is that in the silicon oxide CMP (chemical mechanical polishing) process, the grinding rate of the large pattern is faster than that of the small pattern, which causes the large pattern to be polished after the small pattern is planarized, forming a butterfly depression; The size span of the pattern differs by dozens of times, and the recessed area will be obvious, which will have a great impact on the uniformity of the subsequent deposited film; in addition, the sacrificial layer process of this structure is suitable for making suspended devices, and the split pattern cannot be used The method of dividing large graphics into many small graphics is connected; and considering the complexity of devices and processes in three-dimensional stacking, the sacrificial layer process is made at low temperature

[0004] The current method of reducing the butterfly depression and mechanism deformation is to etch the excess silicon oxide by photolithography, and then CMP. After this method is etched, there will still be sharp protrusions remaining on the edge of the shallow groove, which is not conducive to planarization.

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