Pulse signal detection method based on Windows system function and multi-thread technology

A multi-thread technology and pulse signal technology, which is applied in the field of pulse signal detection, can solve the problems of high cost, small number of timing/counter card channels, long development cycle of FPGA detection pulse signal pulse width, etc., and achieve the effect of ensuring detection accuracy

Inactive Publication Date: 2017-05-24
HARBIN INST OF TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is in order to solve the problem that existing timing/counter card channel number is few, and cost is very high and FPGA d

Method used

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  • Pulse signal detection method based on Windows system function and multi-thread technology
  • Pulse signal detection method based on Windows system function and multi-thread technology
  • Pulse signal detection method based on Windows system function and multi-thread technology

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Experimental program
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specific Embodiment approach 1

[0021] Specific implementation mode one: combine figure 1 Describe this embodiment, the specific process of the pulse signal detection method based on Windows system function and multi-thread technology of this embodiment is:

[0022] Step 1, start, based on the VC environment, use multi-threading technology to create and start an independent auxiliary thread;

[0023] Step 2, read the data collected by the AD card or the digital IO card continuously in an independent auxiliary thread;

[0024] Step 3. Use a software comparator to judge whether there is a pulse signal in the collected data. If there is a pulse signal, perform step 5; if there is no pulse signal, perform step 4;

[0025] Step 4. In the independent auxiliary thread, the Sleep function sleeps for 1ms, and then executes Step 3;

[0026] Step five, calculate the pulse width and level of the pulse signal, the pulse width and amplitude of the pulse signal or the pulse width, level and amplitude of the pulse signal ...

specific Embodiment approach 2

[0029] Specific embodiment two: the difference between this embodiment and specific embodiment one is: adopt software comparator to judge whether there is pulse signal in the data collected in described step 3, if there is pulse signal, execute step 5; If there is no pulse signal, Execute step 4; the specific process is:

[0030] 1) At the beginning, define the high voltage in the independent auxiliary thread to continuously read the data collected by the AD card (for example, the hardware collects the pulse signal, 10V when there is a pulse signal, 0V when there is no pulse signal, and the low voltage is 0V , the high voltage is 10V;) sampling point count variable N=0;

[0031] 2), judging whether the voltage in the data collected by the AD card is read continuously in an independent auxiliary thread is greater than or equal to the threshold, if yes, execute 3); if not, execute 7);

[0032] The voltage in the collected data includes the high voltage in the collected data and...

specific Embodiment approach 3

[0044] Specific embodiment three: the difference between this embodiment and specific embodiment one or two is that: in the step three, a software comparator is used to judge whether there is a pulse signal in the collected data, if there is a pulse signal, perform step five; if there is no pulse signal, execute step 4; the specific process is:

[0045] 1), start, define the high-level sampling point counting variable N=0 in the data collected by the digital IO card;

[0046] 2), judge whether the level in the data collected by the digital IO card is high level (for example, high level is 1, low level is 0;), if yes, perform 3); if not, perform 5);

[0047] 3), the counting variable is N+1, judge whether N is equal to 1, if yes, execute 4); if not, execute 2);

[0048] 4), the sampling point is the first high-level sampling point after the rising edge of the pulse signal, store the current time T1, and execute 2);

[0049] 5), judge whether N is greater than A, if yes, execute...

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Abstract

The invention provides a pulse signal detection method based on a Windows system function and multi-thread technology and relates to the pulse signal detection method. The invention is to solve the problems of smaller number of channels and high cost of an existing timing/counter card, and long development period when utilizing an FPGA to detect pulse signal pulse width. The method comprises the following steps: 1) establishing and starting an independent auxiliary thread through the multi-thread technology; 2) reading data collected by an AD card or a digital IO card uninterruptedly; 3) judging whether the collected data has a pulse signal, if so, executing the step 5), or otherwise, executing the step 4); 4) when a Sleep function is dormant for 1 ms, executing the step 3); 5) calculating pulse width and level, pulse width and amplitude or pulse width, level and amplitude of the pulse signal based on the Windows system function, and executing the step 6); and 6) sending the pulse width, level and amplitude to a main thread, judging whether the collected data is detected, if so, ending the process, or otherwise, executing the step 4). The method is used for the field of data acquisition and signal processing.

Description

technical field [0001] The invention belongs to the technical field of data acquisition and signal processing, and relates to a pulse signal detection method. Background technique [0002] With the increasing demand for modern test tasks, higher requirements are placed on the detection of pulse signals. Not only the pulse width of the pulse signal needs to be detected, but also its amplitude or level state needs to be detected at the same time, and more acquisition channels are required. The pulse width detection method of the timer / counter card has the disadvantages of a small number of channels and only pulse width detection, which cannot meet the requirements of the test task. [0003] The methods of synchronous detection of pulse signal pulse width and amplitude or level state mainly include using timing / counter card and AD acquisition card or digital IO card at the same time, using FPGA and AD acquisition card or digital IO card, AD card or digital IO card Combination ...

Claims

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Application Information

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IPC IPC(8): G01R29/02G01R19/04
CPCG01R29/023G01R19/04
Inventor 丁明理李贤张永强杨光磊董娜李思佳
Owner HARBIN INST OF TECH
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