Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

SIP module testing method based on on-chip embedded microsystem

A module testing, module internal technology, applied in the direction of analog/digital conversion calibration/testing, electronic circuit testing, measuring electricity, etc., to achieve the effect of test optimization, improve test efficiency, improve efficiency and test effectiveness

Active Publication Date: 2017-06-09
BEIJING MXTRONICS CORP +1
View PDF7 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The problem that technology solves among the present invention is: overcome the deficiency of prior art, propose a kind of SIP module test method based on embedded microsystem on chip, this method is on the basis of not improving SIP module design complexity, effectively to SIP module function , Internal interconnection test, to the greatest extent meet the requirements of full test coverage of SIP module, improve the test efficiency on the basis of ensuring the correctness of SIP module

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • SIP module testing method based on on-chip embedded microsystem

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] The method of the present invention is based on the designer, and the production links are not within the scope of the invention. The test design method adopting the SIP module of the present invention includes two parts: hardware test platform design and software test scheme design. The involvement between the two parts of the design is relatively large, and it needs to be coordinated at the same time.

[0024] figure 1 For the hardware test platform design schematic diagram of the present invention, peripheral circuit provides system resources (electrical signal, ground signal, clock signal, etc.) and board-level interconnection for whole board (comprising device under test); CPU pin in SIP module is connected with internal FPGA , can test the corresponding pins of CPU and FPGA; the external FPGA chip receives part of the output signal of the SIP module, and accesses the output signal result for the test system to read.

[0025] A kind of SIP module test method base...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

A SIP module testing method based on an on-chip embedded microsystem comprises the following steps: firstly using a CPU unit in the SIP module to read-write all addresses of memory units, thus testing the memory unit accuracy; then carrying out an internal sealed self-test and an external auxiliary test for the CPU unit in the SIP module, thus verifying the CPU unit accuracy; finally using the internal CPU unit and an external FPGA to test a FPGA in the SIP module. The method can effectively test the SIP module functions and internal interconnections without increasing the SIP module design complexity, thus satisfying the SIP module full test coverage demands in the maximum level, ensuring the SIP module accuracy, and improving the testing efficiency.

Description

technical field [0001] The invention relates to a SIP module testing method, in particular to a SIP module testing method based on an on-chip embedded microsystem, belonging to the field of integrated circuit design. . Background technique [0002] With the increasing requirements of users for electronic systems or electronic complete machines, electronic systems or electronic complete machines are developing in the direction of multi-function, high performance, miniaturization, light weight, portability, high speed, low power consumption and high reliability. SIP (system in package, system-in-package) technology integrates a variety of circuits with different functions into one package to realize a certain basically complete function. As an effective method to improve the functions of single-chip processors, SIP has received great attention from the industry and has achieved rapid development in recent years. [0003] Because the concept of SIP comes from the design of en...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/28G01R31/3167H03M1/10
CPCG01R31/2851G01R31/2853G01R31/3167H03M1/1071
Inventor 郭权祝天瑞李志远王猛
Owner BEIJING MXTRONICS CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products