Preparation method of drain electrode lightly-offset structure

A drain and gate layer technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as repeatability, poor uniformity, lower product reliability, and poor slope angle, and achieve easy control of dimensions , Improve reliability, reduce the effect of leakage current

Active Publication Date: 2017-06-13
TRULY HUIZHOU SMART DISPLAY
View PDF3 Cites 7 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this preparation method, the gate layer Gate is used for over-etching. After the gate layer Gate is over-etched, the extra size on both sides is used as the size of the drain lightly doped LDD structure. However, th

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Preparation method of drain electrode lightly-offset structure
  • Preparation method of drain electrode lightly-offset structure
  • Preparation method of drain electrode lightly-offset structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0029] The implementation of the present invention will be described in detail below in conjunction with the accompanying drawings. The accompanying drawings are only for reference and description, and do not constitute a limitation to the protection scope of the present invention.

[0030] see Figure 4 , Figure 5 , the embodiment of the present invention provides a method for preparing a light drain offset LDO structure, including the steps of crystallization of the glass substrate Glass1, imaging of the P-Si substrate 2, film formation of the gate insulating layer GI3 and film formation of the gate layer Gate4, The drain light offset LDO structure is formed by the following steps:

[0031] S1. Coating step: coating photoresist PR5 on the gate layer Gate4;

[0032] S2. Half-tone exposure step: exposing the photoresist layer PR5 through a half-tone mask Half-tone Mask6;

[0033] S3. Developing step: developing the photoresist layer PR5 after halftone exposure;

[0034] S...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides a preparation method of a drain electrode lightly-offset structure. The preparation method comprises the steps of glass substrate crystallization, P-Si substrate imaging, gate insulation layer film formation and gate layer film formation. The drain electrode lightly-offset structure is formed through the following steps of a gumming step, a half-tone exposure step, a developing step, a first-time metal etching step, a first-time ion implantation step, a photoresist-ashing step, a second-time metal etching step, a demoulding step and a second-time ion implantation step, wherein photoresist is subjected to half-tone exposure and developing, and two times of heavily doped and lightly doped ion implantation steps, the photoresist-ashing step and the two times of metal etching steps are combined, so that a source electrode or drain electrode heavily doped region, a gate lightly doped region and a drain electrode lightly doped region are formed, a drain electrode lightly offset (LDO) structure is formed, a hot carrier effect is effectively relieved, a leakage current is reduced, the drain electrode lightly-doped structure has an easy-to-control size and better processing repeatability and uniformity, the production cost and the bad product rate are reduced, and the reliability of a TFT (Thin Film Transistor) product is improved.

Description

technical field [0001] The invention relates to the field of semiconductor device preparation and display, in particular to a preparation method of a light drain offset structure. Background technique [0002] In the display industry, the leakage characteristics of thin film crystalline silicon (Thin Film Transistor, referred to as TFT) have always been the characteristics that enterprises and R&D personnel pay attention to. If the leakage current of thin film transistor TFT is too large, it will not be able to play a good role in the switching of thin film transistor TFT. characteristic. When the thin film transistor TFT is turned off, a large current still flows. The reason for the leakage current of thin film transistor TFT is mainly the hot carrier effect, especially the high mobility polysilicon Poly-Si, microcrystalline silicon and single crystal silicon-thin film transistor TFT, in the node part with different doping concentration, A large leakage current will be ge...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L21/336
CPCH01L29/66742H01L29/78621
Inventor 李松举李成祝汉泉苏君海李建华
Owner TRULY HUIZHOU SMART DISPLAY
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products