Process-integrated approach to improve gate oxide reliability of high-voltage devices in flash memory

Abstract

The invention discloses a process integration method for improving the reliability of a gate oxide layer of a high-voltage device in a flash memory, comprising steps: step 1, providing a semiconductor substrate and forming field oxygen; step 2, forming a liner oxide layer; step 3, Carry out the ion implantation of the well region of the high-voltage device; Step 4, carry out the threshold voltage adjustment ion implantation of each flash memory cell; Step 5, remove the liner oxide layer of the flash memory cell area and the high-voltage device area at the same time; Form the required tunneling oxide layer of the flash memory cell on the surface of the semiconductor substrate of the high-voltage device region; step seven, form the first layer of polysilicon and ONO layer; step eight, etch the floating gate required for the gate structure of the flash memory cell Polysilicon layer and ONO layer. The invention can reduce the damage of the gate oxide layer of the high-voltage device, improve the reliability of the gate oxide layer of the high-voltage device, and further improve the reliability of the high-voltage device.

Description

technical field [0001] The invention relates to a manufacturing method of a semiconductor integrated circuit, in particular to a process integration method for improving the reliability of the gate oxide layer of a high-voltage device in a flash memory. Background technique [0002] Flash memory (Flash) has been widely used as the best choice for non-volatile memory applications due to its advantages of high density, low price, and electrical programmability and erasability. At present, flash memory cells are mainly implemented at the 65nm technology node. With the demand for large-capacity flash memory, the number of chips on each silicon wafer will be reduced by using the existing technology nodes. At the same time, the increasing maturity of new technology nodes also promotes the production of flash memory cells with high-node technologies. It means that the size of the flash memory unit needs to be reduced, and the reduction of the width of the active region and the len...

AI Technical Summary

Problems solved by technology

This silicon oxide, which is damaged by high-voltage potential well ion implantation, removed by multiple photoresists, and affected by the formation of tunneling silicon oxide, is easily damaged by etching when the subsequent floating gate and ONO layer are removed, resulting in device reliability. degradation

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