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Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve the problems of difficult process, great impact on performance, and the quality of interconnect structure needs to be improved, and achieve The effect of improved quality, electrical performance and reliability performance

Active Publication Date: 2020-07-10
SEMICON MFG INT (SHANGHAI) CORP +1
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AI Technical Summary

Problems solved by technology

With the advancement of technology nodes, the size of the interconnection structure has become smaller and smaller; correspondingly, the process of forming the interconnection structure has become more and more difficult, and the formation quality of the interconnection structure has a great impact on the back end (Back End OfLine , BEOL) The performance of the circuit is greatly affected, and in severe cases, it will affect the normal operation of the semiconductor device
[0004] However, the quality of the interconnect structure formed by the existing technology needs to be improved

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

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Embodiment Construction

[0015] It can be seen from the background technology that the quality of the interconnection structure formed in the prior art needs to be improved, and the reason is analyzed in combination with a manufacturing method of a semiconductor structure. refer to Figure 1 to Figure 5 , shows a structural schematic diagram corresponding to each step in a manufacturing method of a semiconductor structure. The manufacturing method of described semiconductor structure comprises the following steps:

[0016] refer to figure 1 , providing a substrate 100, the substrate 100 is formed with an underlying interconnection structure 110, the underlying interconnection structure 110 includes an underlying etch barrier layer 111, an underlying dielectric layer 112 located on the underlying etch barrier layer 111, And the bottom metal layer 113 located in the bottom dielectric layer 112 .

[0017] The substrate 100 includes a first region I and a second region II, and the subsequent steps incl...

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Abstract

The invention discloses a semiconductor structure and a manufacturing method thereof. The method includes the following steps: providing a substrate that has a bottom layer interconnection structure;forming an etching termination layer on the substrate and the bottom layer interconnection structure; forming a dielectric layer on the etching termination layer; forming a hard mask layer on the dielectric layer; forming a through hole graphic layer that covers the hard mask layer; forming an initial through hole with the through hole graphic layer as a mask etching part thickness dielectric layer; removing the through hole graphic layer; forming an initial groove with the hard mask layer as a mask etching dielectric layer, the initial through hole protruding from the etching termination layer in the etching process, the initial through hole and the initial groove constituting an initial opening; removing the hard mask layer and then removing the etching termination layer that protrudes from the initial opening, forming an opening that protrudes from the bottom layer interconnection structure; and filling the opening with the conductive material. According to the invention, the methodremoves the hard mask layer and then removes the etching termination layer, and can enlarge the top part of the opening in the process of removing the etching termination layer, so that the method herein can increase the filling capability of the conductive material and prevent loss to the bottom layer interconnection structure.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a semiconductor structure and a manufacturing method thereof. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, people's requirements for the integration and performance of integrated circuits are becoming higher and higher. In order to improve integration and reduce costs, the critical dimensions of components are getting smaller and the circuit density inside integrated circuits is increasing. This development makes the surface of the wafer unable to provide enough area to make the required interconnection lines. [0003] In order to meet the requirements of the interconnection line after the critical dimension is reduced, at present, the conduction between different metal layers or the metal layer and the substrate is realized through the interconnection structure. With the advancement of technology nodes, the size of t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/522
CPCH01L21/76802H01L21/76804H01L21/76877H01L23/522
Inventor 周俊卿袁可方何其暘
Owner SEMICON MFG INT (SHANGHAI) CORP