A kind of semiconductor device and its manufacturing method

Abstract

The present invention provides a semiconductor device and a manufacturing method thereof. The method includes the following steps that: a substrate is provided, an interlayer dielectric layer and a semiconductor material layer are sequentially formed on the substrate from top to bottom; the semiconductor material layer is patternized, so that an opening exposing the interlayer dielectric layer isformed in the semiconductor material layer; a spacer structure is formed at the bottom of the sidewall of the opening; a dielectric layer is formed on the substrate so as to cover the surface of the semiconductor material layer, the bottom and sidewall of the opening, as well as the spacer structure; and a metal layer is formed on the surface of the dielectric layer, and the metal layer is patternized, so that a first metal pattern at the bottom of the opening and a second metal pattern located on the semiconductor material layer are formed. According to the manufacturing method of the semiconductor device provided by the present invention, the spacer structure at the bottom of the sidewall of the opening is formed, and therefore, metal residues are effectively avoided, and the stable performance of the semiconductor device can be ensured.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a semiconductor device and a manufacturing method thereof. Background technique [0002] The metal line film forming process has a crucial influence on the characteristics of the complementary metal oxide semiconductor image sensor (CMOS Image Sensor, CIS), especially the conduction resistance of the device. Due to the trend of semiconductor process integration, the performance of semiconductor chips is becoming more and more abundant, which is accompanied by the concentration of circuits caused by the degree of integration of semiconductor chips, and the increase in heat generation of devices, which ultimately affects the performance and service life of devices. [0003] The existing CIS manufacturing process usually includes first completing the manufacturing process on the front side of the semiconductor substrate (usually a silicon substrate), such as forming an interl...

AI Technical Summary

Problems solved by technology

Due to the trend of semiconductor process integration, the performance of semiconductor chips is becoming more and more abundant, which is accompanied by the concentration of circuits caused by the degree of integration of semiconductor chips, and the increase in heat generation of devices, which ultimately affects the performance and service life of devices.

[0003] The existing CIS manufacturing process usually includes first completing the manufacturing process on the front side of the semiconductor substrate (usually a silicon substrate), such as forming an interlayer dielectric layer and a metal interconnection structure on the front side of the silicon substrate; The front side of the substrate is bonded to the support substrate, and then the backside process of the silicon substrate is performed; the backside process of the silicon substrate usually includes forming an opening through the silicon substrate to expose the interlayer dielectric layer, and then A metal layer (usually an aluminum layer) is deposited on the back side of a silicon substrate, and then the metal layer is etched and patterned to form required metal patterns, such as interconnect lines, pads, etc., due to the relatively thick silicon substrate Large, resulting in a relatively large step between the bottom of the opening and the back surface of the silicon substrate, which in turn causes metal residues to be formed at the bottom of the sidewall of the opening during the etching process to form the above metal pattern

[0004] Metal residue is one of the problems in the CIS back-end process. Incomplete removal of metal residue will have a significant impact on resistivity, leakage current and yield

However, excessive etching of metal residues will lead to oxide loss at the bottom of the semiconductor and damage to silicon nitride, which will affect the stability of the semiconductor.

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