Constant current device and manufacturing method thereof
A technology of constant current device and manufacturing method, which is applied to semiconductor devices, electrical components, transistors, etc., to achieve the effect of saving chip area, avoiding the problem of reverse voltage resistance, and stable current value
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Embodiment 1
[0059] Such as Figure 4 As shown, a constant current device includes two parts: a cell area and a terminal area. The cell area includes a plurality of cells 1(1), 1(2)...1(e) with the same structure and sequentially connected , each cell includes a P-type doped substrate 2, an N-type epitaxial layer 3, a diffused P-type well region 4 located in the N-type epitaxial layer 3, and the diffused P-type well region 4 is two and located respectively At both ends of each cell, the first P-type heavily doped region 5 and the N-type heavily doped region 7 located in the diffused P-type well region 4, the first P-type heavily doped region 5 is located in the N-type heavily doped region On both sides of the impurity region 7, an oxide layer 10 is provided on the upper surface of the N-type epitaxial layer 3 and the diffused P-type well region 4, and an N-type depletion channel is arranged between the upper surface of the diffused P-type well region 4 and the oxide layer 10 Region 6, the...
Embodiment 2
[0064] Such as Figure 5 As shown, the difference between this embodiment and Embodiment 1 is that: the terminal region includes a P-type doped region 21 formed around the groove by thermal process after the groove implantation.
[0065] The manufacturing method of the constant current device: the constant current device introduces a groove in the terminal region, and performs P-type impurity implantation around the groove to form a P-type doped region 21, so that the cell region and the device edge defect Phase isolation is achieved by PN junction isolation to achieve forward constant current and reverse high voltage resistance.
[0066] The manufacturing method of the constant current device specifically includes the following steps:
[0067] Step 1: using a P-type silicon wafer as a P-type doped substrate 2;
[0068] Step 2: performing N-type doped epitaxy on the P-type doped substrate 2;
[0069] Step 3: photoetching the ion implantation window of the P-type doped ring ...
Embodiment 3
[0101] As shown in FIG. 9(1)-(9), the manufacturing method of the constant current device provided in this embodiment, compared with FIG. 8, in FIG. 9 omits the groove implantation and directly grows the oxide layer.
[0102] The initial silicon wafer is epitaxy with one side as the front side, and then the terminal area is processed, including ring implantation, deep groove etching, groove side wall implantation, thick field oxygen in the growth groove and the upper surface of the terminal area, etc.; then, the junction is pushed to form a diffusion P-type well region; after pre-oxidation, perform channel adjustment implantation to form a surface depletion channel, then perform N-type heavily doped implantation, P-type heavily doped implantation, etch the redundant oxide layer; then deposit the oxide layer on the front side, Metal layer and passivation; then perform P-type heavily doped back implant; finally deposit metal layer and passivation on the back.
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