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LDMOS device and manufacturing method therefor

A manufacturing method and device technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of high manufacturing cost and complex manufacturing process, achieve low on-resistance, improve integration, and reduce conduction. The effect of resistance

Active Publication Date: 2018-09-25
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0003] At present, a typical LDMOS device structure, due to the formation of its drift region and deep well, is realized by using two deep well implantation masks as masks and ion implantation respectively, while the body region needs to be realized by one Additional mask mask and ion implantation are formed, the manufacturing process is relatively complicated, and the manufacturing cost is high

Method used

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  • LDMOS device and manufacturing method therefor
  • LDMOS device and manufacturing method therefor
  • LDMOS device and manufacturing method therefor

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Embodiment Construction

[0040] Please refer to figure 1 , an LDMOS device comprising: a semiconductor substrate 100, a drift region 101 and a deep well 102 arranged in the semiconductor substrate 100, a body region 103 arranged in the deep well 102, a gate arranged on the semiconductor substrate 100 A pole structure 110, a source region 105, a body contact region 106 and a shallow trench isolation structure 107 disposed in the body region 103, and electrodes 108 and 109 drawn from the drain region 104 and the body contact region 106, respectively. The body contact region 106 is used to adjust and control the potential of the body region 103, the doping types of the drift region 101 and the deep well 102 are opposite, and the doping type of the body region 103 and the deep well 102 are the same, thereby increasing the breakdown voltage and reduce the on-resistance. In this typical LDMOS device structure, due to the formation of the drift region 101 and the deep well 102, two deep well implant masks a...

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Abstract

The invention provides an LDMOS device and a manufacturing method therefor. The method can be compatible with the CMOS technology, and enables a conventional deep well and a body region to be combinedinto one body, thereby avoiding a body region formed through an additional mask plate, effectively improving the integration degree, reducing the production cost and technological cost, and finally obtaining an LDMOS device which is low in conduction resistance and is high in breakdown voltage.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing, in particular to an LDMOS device and a manufacturing method thereof. Background technique [0002] In recent years, LDMOS (Laterally Diffused Metal Oxide Semiconductor, Laterally Diffused Metal Oxide Semiconductor) components have been widely used in various power integrated circuits or intelligent power integrated circuits. LDMOS devices need to have high breakdown voltage (BV) and low on-state resistance (Rdson) in use to improve the performance of the device. The maximum voltage that can be applied between the gate and drain when worn. [0003] At present, a typical LDMOS device structure, due to the formation of the drift region and the deep well, is realized by using two deep well implantation masks as masks and ion implantation respectively, while the body region needs to pass through a mask. The additional reticle mask and ion implantation are formed, the manufac...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06H01L21/336H01L21/266
CPCH01L29/0619H01L29/66681H01L29/7816H01L21/266H01L29/7835H01L29/1045H01L29/66659
Inventor 方磊
Owner SEMICON MFG INT (SHANGHAI) CORP
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