Nanowire fence gate mos device and preparation method thereof

Abstract

The invention provides a nanowire surrounding gate MOS device and a preparation method thereof. In this method, after the nanowire stack is formed, a highly covering chemical vapor deposition process is used to fill the dielectric material into the grooves between the adjacent nanowires, so that the dielectric material can have a strong filling ability, thereby Wrap the fin structure of the nanowires, and then form a dummy gate across the fin structure, so that the dummy gate material does not fill the grooves between the nanowires, and then remove the dielectric material in the grooves by etching , which ensures better contact between the gate stack and the nanowires, thereby improving the performance of the device. In addition, in the present application, the above-mentioned dielectric material is filled in the grooves between the nanowires first, and then the dummy gate is formed, which effectively avoids the situation that the dummy gate material remains in the groove in the prior art, and effectively reduces the dummy gate. The process difficulty of the etching step makes it compatible with the current mainstream fin structure field effect transistor manufacturing process.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a nanowire-enclosed gate MOS device and a preparation method thereof. Background technique [0002] In advanced CMOS manufacturing, the combination of nanowire channel and ring gate has become a hot technology to solve the process below 5nm. At present, nanowire gate MOS devices mainly include two preparation methods: the first method is to grow Si / GeSi stacks on the substrate by means of epitaxial growth, and then selectively etch the GeSi to leave Si nanometers. Wire. The advantage is that the process is similar to the FinFet process, but the limitation is that the epitaxial process has more lattice defects than bulk silicon, especially after multi-layer alternating epitaxy, it is difficult to ensure that the crystal lattice of the epitaxial layer is perfect, so the device performance will be affected. . The second method is to directly etch the substrate silicon (ani...

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Problems solved by technology

[0003] The main purpose of the present invention is to provide a nanowire-enclosed gate MOS device and its preparation method, so as to solve the problem of the dummy gate material between the nanowires during the dummy gate etching process in the prior art when preparing the nanowire-enclosed gate MOS device. remaining problems

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